Conferences in DBLP
(ahs) Aleksandar Tasic Adaptive Multifunctional Circuits and Systems for Future Generations of Wireless Communications. [Citation Graph (0, 0)][DBLP ] Conf ] Varun Aggarwal , Meng Mao , Una-May O'Reilly A Self-Tuning Analog Proportional-Integral-Derivative (PID) Controller. [Citation Graph (0, 0)][DBLP ] Conf ] Mustafa Keskin , Nurcan Keskin A Tuning Technique for Switched-Capacitor Circuits. [Citation Graph (0, 0)][DBLP ] Conf ] Mustafa Keskin A Background Mismatch Calibration For Capacitive Digitial-To-Analog Converters RTERS. [Citation Graph (0, 0)][DBLP ] Conf ] Adrian Stoica , Ricardo Salem Zebulum , Didier Keymeulen , Rajeshuni Ramesham , Joseph Neff , Srinivas Katkoori Temperature-Adaptive Circuits on Reconfigurable Analog Arrays. [Citation Graph (0, 0)][DBLP ] Conf ] Martin Trefzer , Jörg Langeheine , Karlheinz Meier , Johannes Schemmel A Modular Framework for the Evolution of Circuits on Configurable Transistor Array Architectures. [Citation Graph (0, 0)][DBLP ] Conf ] Nakul Haridas , Ahmet T. Erdogan , Tughrul Arslan , Mark Begbie Adaptive Micro-Antenna on Silicon Substrate. [Citation Graph (0, 0)][DBLP ] Conf ] Gabriella Kókai , Tonia Christ , Hans Holm Frühauf Using Hardware-Based Particle Swarm Method for Dynamic Optimization of Adaptive Array Antennas. [Citation Graph (0, 0)][DBLP ] Conf ] Ozgur Tamer , Ahmet Özkurt Systolic Array Based Adaptive Beamformer Modeling in SystemC Environment. [Citation Graph (0, 0)][DBLP ] Conf ] Hirokazu Nosato , Masahiro Murakawa , Tetsuya Higuchi Automatic Alignment of Multiple Optical Components Using Genetic Algorithm. [Citation Graph (0, 0)][DBLP ] Conf ] Onur Keskin , Peter Hampton , Rodolphe Conan , Colin Bradley , Aaron Hilton , Celia Blain Woofer-Tweeter Adaptive Optics Test Bench. [Citation Graph (0, 0)][DBLP ] Conf ] Mihai Oltean Switchable Glass: A Possible Medium for Evolvable Hardware. [Citation Graph (0, 0)][DBLP ] Conf ] Omar Paranaiba Vilela Neto , Leone Pereira Masiero , Marco Aurélio Cavalcanti Pacheco , Carlos R. Hall Barbosa Evolvable Hardware Applied to Nanotechnology. [Citation Graph (0, 0)][DBLP ] Conf ] Joseph Kolibal , Daniel Howard The Novel Stochastic Bernstein Method of Functional Approximation. [Citation Graph (0, 0)][DBLP ] Conf ] Horia-Nicolai L. Teodorescu An Adaptive Heuristic Filter for Acceleration. [Citation Graph (0, 0)][DBLP ] Conf ] Nizamettin Aydin , Tughrul Arslan Power Driven Reconfigurable Complex Continuous Wavelet Transform. [Citation Graph (0, 0)][DBLP ] Conf ] Gorn Tepvorachai , Christos A. Papachristou Self-Configurable Neural Network Processor for FIR Filter Applications. [Citation Graph (0, 0)][DBLP ] Conf ] Remzi Arslanalp , Abdullah T. Tola A New State Space Representation Method for Adaptive Log Domain Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Gianluca Tempesti , Pierre-André Mudry , Guillaume Zufferey Hardware/Software Coevolution of Genome Programs and Cellular Processors. [Citation Graph (0, 0)][DBLP ] Conf ] Gunnar Tufte Gene Regulation Mechanisms Introduced in the Evaluation Criteria for a Hardware Cellular Development System. [Citation Graph (0, 0)][DBLP ] Conf ] Justin Lee , Joaquin Sitte Gate-level Morphogenetic Evolvable Hardware for Scalability and Adaptation on FPGAs. [Citation Graph (0, 0)][DBLP ] Conf ] Andres Upegui , Eduardo Sanchez Evolving Hardware with Self-reconfigurable connectivity in Xilinx FPGAs. [Citation Graph (0, 0)][DBLP ] Conf ] Jorge Pena , Andres Upegui , Eduardo Sanchez Particle Swarm Optimization with Discrete Recombination: An Online Optimizer for Evolvable Hardware. [Citation Graph (0, 0)][DBLP ] Conf ] Lukás Sekanina Evolutionary Design of Digital Circuits: Where Are Current Limits? [Citation Graph (0, 0)][DBLP ] Conf ] Emanuele Stomeo , Tatiana Kalganova , Cyrille Lambert Generalized Disjunction Decomposition for the Evolution of Programmable Logic Array Structures. [Citation Graph (0, 0)][DBLP ] Conf ] Lukás Sekanina , Lukás Starecek , Zbysek Gajda , Zdenek Kotásek Evolution of Multifunctional Combinational Modules Controlled by the Power Supply Voltage. [Citation Graph (0, 0)][DBLP ] Conf ] Xuesong Yan , Wei Wei , Rui Liu , Sanyou Y. Zeng , Lishan Kang Designing Electronic Circuits by Means of Gene Expression Programming. [Citation Graph (0, 0)][DBLP ] Conf ] Wing On Fung , Tughrul Arslan , Sami Khawam Genetic Algorithm based Engine for Domain-Specific Reconfigurable Arrays. [Citation Graph (0, 0)][DBLP ] Conf ] Evangelos F. Stefatos , Tughrul Arslan , Didier Keymeulen , Ian Ferguson Towards the Integration of Drive Control Loop Electronics of the JPL/Boeing Gyroscope within an Autonomous Robust Custom-Reconfigurable Platform. [Citation Graph (0, 0)][DBLP ] Conf ] Rui Liu , Sang-you Zeng , Lixin X. Ding , Lishan Kang , Hui Li , Yuping Chen , Yong Liu , Yueping Han An Efficient Multi-Objective Evolutionary Algorithm for Combinational Circuit Design. [Citation Graph (0, 0)][DBLP ] Conf ] Hugo de Garis Hardware Accelerators for Evolving Building Block Modules for Artificial Brains. [Citation Graph (0, 0)][DBLP ] Conf ] Steffen Toscher , Thomas Reinemann , Roland Kasper An Adaptive FPGA-Based Mechatronic Control System Supporting Partial Reconfiguration of Controller Functionalities. [Citation Graph (0, 0)][DBLP ] Conf ] Mohsin A. Syed , Eberhard Schüler Reconfigurable Parallel Computing Architecture for On-Board Data Processing. [Citation Graph (0, 0)][DBLP ] Conf ] H. Fatih Ugurdag , Yahya Sahin , Onur Baskirt Population-Based FPGA Solution to Mastermind Game. [Citation Graph (0, 0)][DBLP ] Conf ] Martin Margala Adaptable Architectures for Signal Processing Applications. [Citation Graph (0, 0)][DBLP ] Conf ] Wim Vanderbauwhede The Gannet Service-Based SoC: A Service-level Reconfigurable Architecture. [Citation Graph (0, 0)][DBLP ] Conf ] Tanya Vladimirova , Xiaofeng Wu On-Board Partial Run-Time Reconfiguration for Pico-Satellite Constellations. [Citation Graph (0, 0)][DBLP ] Conf ] Sajid Baloch , Tughrul Arslan , Adrian Stoica Embedded Reconfigurable Array Fabrics for Efficient Implementation of Image Compression Techniques. [Citation Graph (0, 0)][DBLP ] Conf ] Andy M. Tyrrell , Hong Sun A Honeycomb Development Architecture for Robust Fault-Tolerant Design. [Citation Graph (0, 0)][DBLP ] Conf ] Katarina Paulsson , Michael Hübner , Jürgen Becker Strategies to On- Line Failure Recovery in Self- Adaptive Systems based on Dynamic and Partial Reconfiguration. [Citation Graph (0, 0)][DBLP ] Conf ] Sajid Baloch , Tughrul Arslan , Adrian Stoica An Efficient Technique for Preventing Single Event Disruptions in Synchronous and Reconfigurable Architectures. [Citation Graph (0, 0)][DBLP ] Conf ] Didier Keymeulen , Ricardo Salem Zebulum , Rajeshuni Ramesham , Adrian Stoica , Srinivas Katkoori , Sharon Graves , Frank Novak , Charles Antill Self-Adaptive System Based on Field Programmable Gate Array for Extreme Temperature Electronics. [Citation Graph (0, 0)][DBLP ] Conf ] Robert Ross , Richard Hall A FPGA Simulation Using Asexual Genetic Algorithms for Integrated Self-Repair. [Citation Graph (0, 0)][DBLP ] Conf ] Stefanos Skoulaxinos SW-HW Co-design and Fault Tolerant Implementation for the LRID Wireless Communication System. [Citation Graph (0, 0)][DBLP ] Conf ] H. J. Kadim Analytical Modelling of Power Attenuation under Parameter Fluctuations with Applications to Self-Test and Repair. [Citation Graph (0, 0)][DBLP ] Conf ] Savio Chau , Van Dang , Joseph Xu , James Lu An Automatic Technique to Synthesize Avionics Architecture. [Citation Graph (0, 0)][DBLP ] Conf ] H. J. Kadim State-Space Based Analytical Modelling for Real-Time Fault Recovery and Self-Repair with Applications to Biosensors. [Citation Graph (0, 0)][DBLP ] Conf ] Tughrul Arslan , Nakul Haridas , Erfu Yang , Ahmet T. Erdogan , Nick Barton , A. J. Walton , John S. Thompson , Adrian Stoica , T. Vladimirova , Klaus D. McDonald-Maier , W. G. J. Howells ESPACENET: A Framework of Evolvable and Reconfigurable Sensor Networks for Aerospace-Based Monitoring and Diagnostics. [Citation Graph (0, 0)][DBLP ] Conf ] Tanya Vladimirova , Xiaofeng Wu , Kawsu Sidibeh , David Barnhart , Abdul-Halim Jallad Enabling Technologies for Distributed Picosatellite Missions in LEO. [Citation Graph (0, 0)][DBLP ] Conf ] Andrew B. T. Hopkins , Klaus D. McDonald-Maier A Generic On-Chip Debugger for Wireless Sensor Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Gareth Howells , Evangelos Papoutsis , Klaus D. McDonald-Maier Novel Techniques for Ensuring Secure Communications for Distributed Low Power Devices. [Citation Graph (0, 0)][DBLP ] Conf ] A. Neslin Ismailoglu , O. Benderli , Soner Yesil , Refik Sever , Burak Okcan , O. Sengul , Rusen Öktem GEZGIN & GEZGIN-2: Adaptive Real-Time Image Processing Subsystems for Earth Observing Small Satellites. [Citation Graph (0, 0)][DBLP ] Conf ] Shengmin Ge , Hao Cheng A Comparative Design of Satellite Attitude Control System with Reaction Wheel. [Citation Graph (0, 0)][DBLP ] Conf ] Muhammed R. Pac , Aydan M. Erkmen , Ismet Erkmen Towards Fluent Sensor Networks: A Scalable and Robust Self-Deployment Approach. [Citation Graph (0, 0)][DBLP ] Conf ] Kyrre Glette , Jim Torresen , Moritoshi Yasunaga , Yoshiki Yamaguchi On-Chip Evolution Using a Soft Processor Core Applied to Image Recognition. [Citation Graph (0, 0)][DBLP ] Conf ] Mustafa Parlak , Ilker Hamzaoglu An Efficient Hardware Architecture for H.264 Adaptive Deblocking Filter. [Citation Graph (0, 0)][DBLP ] Conf ] Jim Torresen , Jonas Jakobsen An FPGA Implemented Processor Architecture with Adaptive Resolution. [Citation Graph (0, 0)][DBLP ] Conf ] Syamsiah Mashohor , Jonathan R. Evans , Ahmet T. Erdogan Automatic Hybrid Genetic Algorithm Based Printed Circuit Board Inspection. [Citation Graph (0, 0)][DBLP ] Conf ] Selcuk Okdem , Dervis Karaboga Routing in Wireless Sensor Networks Using Ant Colony Optimization. [Citation Graph (0, 0)][DBLP ] Conf ] B. Ahmad , Ahmet T. Erdogan , Sami Khawam Architecture of a Dynamically Reconfigurable NoC for Adaptive Reconfigurable MPSoC. [Citation Graph (0, 0)][DBLP ] Conf ] Jichuan Zhao , Ahmet T. Erdogan A Novel Self-Organizing Hybrid Network Protocol for Wireless Sensor Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Ioannis Nousias , Tughrul Arslan Wormhole Routing with Virtual Channels using Adaptive Rate Control for Network-on-Chip (NoC). [Citation Graph (0, 0)][DBLP ] Conf ] Nasri Sulaiman , Ahmet T. Erdogan A Multi-Objective Genetic Algorithm for On-Chip Real-time Adaptation of a Multi-Carrier Based Telecommunications Receiver. [Citation Graph (0, 0)][DBLP ] Conf ] Ediz Çetin , Süleyman Sirri Demirsoy , Izzet Kale , Richard C. S. Morling A Low-Complexity Self-Calibrating Adaptive Quadrature Receiver. [Citation Graph (0, 0)][DBLP ] Conf ] Heiko Hinkelmann , Peter Zipf , Manfred Glesner Design Concepts for a Dynamically ReconfigurableWireless Sensor Node. [Citation Graph (0, 0)][DBLP ] Conf ] Gökmen Altay , Osman N. Uçan , Nejla Altay , Senay Yalçin On the Trellis Structures of Geometric Augmented Product Codes. [Citation Graph (0, 0)][DBLP ] Conf ] Khalil Zebbiche , Lahouari Ghouti , Fouad Khelifi , Ahmed Bouridane Protecting Fingerprint Data Using Watermarking. [Citation Graph (0, 0)][DBLP ] Conf ] Amr T. Abdel-Hamid , Sofiène Tahar , El Mostapha Aboulhamid Finite State Machine IP Watermarking: A Tutorial. [Citation Graph (0, 0)][DBLP ] Conf ] Walid R. Boukabou , Lahouari Ghouti , Ahmed Bouridane Face Recognition Using a Gabor Filter Bank Approach. [Citation Graph (0, 0)][DBLP ] Conf ] Lin Yuan , Gang Qu , Lahouari Ghouti , Ahmed Bouridane VLSI Design IP Protection: Solutions, New Challenges, and Opportunities. [Citation Graph (0, 0)][DBLP ] Conf ] Osama Al-Khaleel , Christos A. Papachristou , Frank Wolff , Kiamal Z. Pekmestzi A Large Scale Adaptable Multiplier for Cryptographic Applications. [Citation Graph (0, 0)][DBLP ] Conf ] 