Conferences in DBLP

IEEE International Conference on Formal Engineering Methods (icfem)
2007 (conf/icfem/2007)

1. Jean-Raymond Abrial
   A System Development Process with Event-B and the Rodin Platform. [Citation Graph (0, 0)][DBLP]
   ICFEM, 2007, pp:1-3 [Conf]
   
2. T. S. E. Maibaum
   Challenges in Software Certification. [Citation Graph (0, 0)][DBLP]
   ICFEM, 2007, pp:4-18 [Conf]
   
3. Martin de Groot
   Integrating Formal Methods with System Management. [Citation Graph (0, 0)][DBLP]
   ICFEM, 2007, pp:19-36 [Conf]
   
4. Jeremy W. Bryans, John S. Fitzgerald
   Formal Engineering of XACML Access Control Policies in VDM++. [Citation Graph (0, 0)][DBLP]
   ICFEM, 2007, pp:37-56 [Conf]
   
5. Jin Song Dong, Yuzhang Feng, Ho-fung Leung
   A Verification Framework for Agent Knowledge. [Citation Graph (0, 0)][DBLP]
   ICFEM, 2007, pp:57-75 [Conf]
   
6. Rasmus Adler, Ina Schaefer, Tobias Schüle, Eric Vecchié
   From Model-Based Design to Formal Verification of Adaptive Embedded Systems. [Citation Graph (0, 0)][DBLP]
   ICFEM, 2007, pp:76-95 [Conf]
   
7. Chunqing Chen, Jin Song Dong, Jun Sun
   Machine-Assisted Proof Support for Validation Beyond Simulink. [Citation Graph (0, 0)][DBLP]
   ICFEM, 2007, pp:96-115 [Conf]
   
8. Jacques Julliand, Hassan Mountassir, Emilie Oudot
   VeSTA: A Tool to Verify the Correct Integration of a Component in a Composite Timed System. [Citation Graph (0, 0)][DBLP]
   ICFEM, 2007, pp:116-135 [Conf]
   
9. Shaoying Liu
   Integrating Specification-Based Review and Testing for Detecting Errors in Programs. [Citation Graph (0, 0)][DBLP]
   ICFEM, 2007, pp:136-150 [Conf]
   
10. Ana Cavalcanti, Marie-Claude Gaudel
    Testing for Refinement in CSP. [Citation Graph (0, 0)][DBLP]
    ICFEM, 2007, pp:151-170 [Conf]
    
11. Lihua Duan, Jessica Chen
    Reducing Test Sequence Length Using Invertible Sequences. [Citation Graph (0, 0)][DBLP]
    ICFEM, 2007, pp:171-190 [Conf]
    
12. Wenhui Zhang
    Model Checking with SAT-Based Characterization of ACTL Formulas. [Citation Graph (0, 0)][DBLP]
    ICFEM, 2007, pp:191-211 [Conf]
    
13. Carlos Gonzalia, Annabelle McIver
    Automating Refinement Checking in Probabilistic System Design. [Citation Graph (0, 0)][DBLP]
    ICFEM, 2007, pp:212-231 [Conf]
    
14. Kuntal Das Barman, Debapriyay Mukhopadhyay
    Model Checking in Practice: Analysis of Generic Bootloader Using SPIN. [Citation Graph (0, 0)][DBLP]
    ICFEM, 2007, pp:232-245 [Conf]
    
15. Cong Tian, Zhenhua Duan
    Model Checking Propositional Projection Temporal Logic Based on SPIN. [Citation Graph (0, 0)][DBLP]
    ICFEM, 2007, pp:246-265 [Conf]
    
16. Juan Ignacio Perna, Jim Woodcock
    A Denotational Semantics for Handel-C Hardware Compilation. [Citation Graph (0, 0)][DBLP]
    ICFEM, 2007, pp:266-285 [Conf]
    
17. Marcel Oliveira, Jim Woodcock
    Automatic Generation of Verified Concurrent Hardware. [Citation Graph (0, 0)][DBLP]
    ICFEM, 2007, pp:286-306 [Conf]
    
18. Guillermo Rodríguez-Navas, Julian Proenza, Hans Hansson
    Modeling and Verification of Master/Slave Clock Synchronization Using Hybrid Automata and Model-Checking. [Citation Graph (0, 0)][DBLP]
    ICFEM, 2007, pp:307-326 [Conf]
    
19. Benoît Fraikin, Marc Frappier
    Efficient Symbolic Execution of Large Quantifications in a Process Algebra. [Citation Graph (0, 0)][DBLP]
    ICFEM, 2007, pp:327-344 [Conf]
    
20. Thuy Duong Vu, Chris R. Jesshope
    Formalizing SANE Virtual Processor in Thread Algebra. [Citation Graph (0, 0)][DBLP]
    ICFEM, 2007, pp:345-365 [Conf]
    
21. Arjan J. Mooij
    Calculating and Composing Progress Properties in Terms of the Leads-to Relation. [Citation Graph (0, 0)][DBLP]
    ICFEM, 2007, pp:366-386 [Conf]