Conferences in DBLP
David B. H. Tay ETHFB: a new class of even-length wavelet filters for Hilbert pair design. [Citation Graph (0, 0)][DBLP ] Conf ] Ka-yau Ho , Shu-hung Leung Generalized semi-blind channel estimator for TCM-OFDM system. [Citation Graph (0, 0)][DBLP ] Conf ] Gabriel Popescu , Leonid B. Goldgeisser Model compatibility aspects in multilingual simulation environments. [Citation Graph (0, 0)][DBLP ] Conf ] Hanqing Xing , Le Jin , Degang Chen , Randall L. Geiger Characterization of a current-mode bandgap circuit structure for high-precision reference applications. [Citation Graph (0, 0)][DBLP ] Conf ] Tara Julia Hamilton , Craig Jin , André van Schaik An analysis of matching in the Tau cell log-domain filter. [Citation Graph (0, 0)][DBLP ] Conf ] Alex Wong , Kong-Pang Pun , Yuan-Ting Zhang , Oliver Chiu-sing Choy An ECG measurement IC using driven-right-leg circuit. [Citation Graph (0, 0)][DBLP ] Conf ] T. K. K. Tsang , M. L. El-Cramal Fully integrated sub-microWatt CMOS ultra wideband pulse-based transmitter for wireless sensors networks. [Citation Graph (0, 0)][DBLP ] Conf ] Cesare Alippi , D. Cogliati , Giovanni Vanini A statistical approach to localize passive RFIDs. [Citation Graph (0, 0)][DBLP ] Conf ] Tsung-Hsi Chiang , Lan-Rong Dung System-level verification on high-level synthesis of dataflow graph. [Citation Graph (0, 0)][DBLP ] Conf ] Jinhu Lu , Guanrong Chen A brief overview of multi-scroll chaotic attractors generation. [Citation Graph (0, 0)][DBLP ] Conf ] Wei-Cheng Lin , Chung-Ho Chen Exploring reusable frame buffer data for MPEG-4 video decoding. [Citation Graph (0, 0)][DBLP ] Conf ] Hoi-Ming Wong , Oscar C. Au , Andy Chang , Shu-Kei Yip , Chi-Wang Ho Fast mode decision and motion estimation for H.264 (FMDME). [Citation Graph (0, 0)][DBLP ] Conf ] Ji Tao , M. Turjo , Yap-Peng Tan Quickest change detection for health-care video surveillance. [Citation Graph (0, 0)][DBLP ] Conf ] Wen-Chung Kao , Chien-Chih Hsu , Chih-Chung Kao , Shou-Hung Chen Adaptive exposure control and real-time image fusion for surveillance systems. [Citation Graph (0, 0)][DBLP ] Conf ] Paulo S. R. Diniz , Rozalvo P. Braga , Stefan Werner Set-membership affine projection algorithm for echo cancellation. [Citation Graph (0, 0)][DBLP ] Conf ] Ahmad Darabiha , Anthony Chan Carusone , Frank R. Kschischang A bit-serial approximate min-sum LDPC decoder and FPGA implementation. [Citation Graph (0, 0)][DBLP ] Conf ] Jinsub Park , Yong-Dae Kim , Sangwoon Yang , Younggap You Low power compact design of ARIA block cipher. [Citation Graph (0, 0)][DBLP ] Conf ] Massimo Alioto , Gaetano Palumbo Delay uncertainty due to supply variations in static and dynamic full adders. [Citation Graph (0, 0)][DBLP ] Conf ] Phanumas Khumsat , Apisak Worapishet High-gain current amplifiers for low-power MOSFET-C filters. [Citation Graph (0, 0)][DBLP ] Conf ] Pietro Monsurrò , Salvatore Pennisi , Giuseppe Scotti , Alessandro Trifiletti Inverting closed-loop amplifier architecture with reduced gain error and high input impedance. [Citation Graph (0, 0)][DBLP ] Conf ] Chao Su , Randall L. Geiger Dynamic calibration of current-steering DAC. [Citation Graph (0, 0)][DBLP ] Conf ] K. Osberg , Nathan Schemm , Sina Balkir , J. I. Brand , S. Hallbeck , P. Dowben A hand-held neutron detection sensor system. [Citation Graph (0, 0)][DBLP ] Conf ] Qingwei Li , Zhongfeng Wang Improved k-best sphere decoding algorithms for MIMO systems. [Citation Graph (0, 0)][DBLP ] Conf ] S. Phrompichai , Peerapol Yuvapoositanon A semiblind receiver for space-time block-coded downlink multirate DS-CDMA systems. [Citation Graph (0, 0)][DBLP ] Conf ] V. Venkatasubramanian , Yuan Li Computation of unstable limit cycles in large-scale power system models. [Citation Graph (0, 0)][DBLP ] Conf ] Liangbin Yao , Jaber A. Abu-Qahouq , Issa Batarseh Hybrid discretization in power converters' digital controller design. [Citation Graph (0, 0)][DBLP ] Conf ] Pak-Keung Leung , Oliver Chiu-sing Choy , Cheong-fat Chan , Kong-Pang Pun An optimal normal basis elliptic curve cryptoprocessor for inductive RFID application. [Citation Graph (0, 0)][DBLP ] Conf ] Serdar Özoguz , Ahmed S. Elwakil 2D scroll grid attractors from pulse-excited nonautonomous circuits. [Citation Graph (0, 0)][DBLP ] Conf ] Yu-Kuang Tu , Jar-Ferr Yang , Ming-Ting Sun Statistical rate-distortion estimation for H.264/AVC coders. [Citation Graph (0, 0)][DBLP ] Conf ] Mohamed Rehan , M. Watheq El-Kharashi , Pan Agathoklis , Fayez Gebali An FPGA implementation of the flexible triangle search algorithm for block based motion estimation. [Citation Graph (0, 0)][DBLP ] Conf ] V. Chan , André van Schaik , Shih-Chii Liu Spike response properties of an AER EAR. [Citation Graph (0, 0)][DBLP ] Conf ] Tero Koivisto , Teemu Peltonen , Meigen Shen , Esa Tjukanoff , Ari Paasio Sine wave as a correlating signal for UWB radio. [Citation Graph (0, 0)][DBLP ] Conf ] Swati Mehta , Ralph Etienne-Cummings Normal flow measurement visual motion sensor. [Citation Graph (0, 0)][DBLP ] Conf ] Yuan Yao , Xuefeng Yu , Foster F. Dai , Richard C. Jaeger A 12-bit current steering DAC for cryogenic applications. [Citation Graph (0, 0)][DBLP ] Conf ] P. Eloranta A 14-bit D/A-converter with digital calibration. [Citation Graph (0, 0)][DBLP ] Conf ] Pawel Sniatala , R. Rudnicki Automated design and layout generation for switched current circuits. [Citation Graph (0, 0)][DBLP ] Conf ] S. P. Shang , Xiaodong Hu , Tong Jing Average lengths of wire routing under M-architecture and X-architecture. [Citation Graph (0, 0)][DBLP ] Conf ] M. Parfieniuk , Alexander A. Petrovsky Quaternionic formulation of the first regularity for four-band paraunitary filter banks. [Citation Graph (0, 0)][DBLP ] Conf ] Wei Han , Cheong-fat Chan , Oliver Chiu-sing Choy , Kong-Pang Pun An efficient MFCC extraction method in speech recognition. [Citation Graph (0, 0)][DBLP ] Conf ] Jiun-Wei Horng , Hung-Pin Chou , Iun-Cheng Shiu Current-mode and voltage-mode quadrature oscillator employing multiple outputs CCIIs and grounded capacitors. [Citation Graph (0, 0)][DBLP ] Conf ] Mustak E. Yalcin , Johan A. K. Suykens , Joos Vandewalle Multi-scroll and hypercube attractors from Josephson junctions. [Citation Graph (0, 0)][DBLP ] Conf ] A. P. Sakis Meliopoulos , George J. Cokkinides , G. K. Stefopoulos Voltage stability and voltage recovery: effects of electric load dynamics. [Citation Graph (0, 0)][DBLP ] Conf ] Tim Good , Mohammed Benaissa AES as stream cipher on a small FPGA. [Citation Graph (0, 0)][DBLP ] Conf ] Sumit Bagga , Sandro A. P. Haddad , Wouter A. Serdijn , John R. Long An FCC compliant pulse generator for IR-UWB communications. [Citation Graph (0, 0)][DBLP ] Conf ] V. Berisha , Homin Kwon , Andreas S. Spanias Real-time acoustic monitoring using wireless sensor motes. [Citation Graph (0, 0)][DBLP ] Conf ] M. Mat , Oscar C. Au , S. H. G. Chan , Liwei Giio , Zhiqin Liang Three-loop temporal interpolation for error concealment of MDC. [Citation Graph (0, 0)][DBLP ] Conf ] Eric D. Marsman , Robert M. Senger , G. A. Carichner , S. Kubba , Michael S. McCorquodale , Richard B. Brown DSP architecture for cochlear implants. [Citation Graph (0, 0)][DBLP ] Conf ] D. Neumann , Michael W. Hoffman , Sina Balkir Robust front-end design for ultra wideband systems. [Citation Graph (0, 0)][DBLP ] Conf ] Suresh Atluri , Maysam Ghovanloo A wideband power-efficient inductive wireless link for implantable microelectronic devices using multiple carriers. [Citation Graph (0, 0)][DBLP ] Conf ] L. Wang , Nizamettin Aydin , A. Astaras , M. Ahmadian , P. A. Hammond , T. B. Tang , Erik A. Johannessen , Tughrul Arslan , S. P. Beaumont , B. W. Flynn , A. F. Murray , Jonathan M. Cooper , David R. S. Cumming A sensor system on chip for wireless microsystems. [Citation Graph (0, 0)][DBLP ] Conf ] Maged Ghoneima , Yehea I. Ismail , Muhammad M. Khellah , Vivek De Reducing the data switching activity of serialized datastreams. [Citation Graph (0, 0)][DBLP ] Conf ] DiaaEldin Khalil , Yehea I. Ismail Optimum sizing of power grids for IR drop. [Citation Graph (0, 0)][DBLP ] Conf ] Ramesh Chidambaram , Rene van Leuken , Marc Quax , Ingolf Held , Jos Huisken A multistandard FFT processor for wireless system-on-chip implementations. [Citation Graph (0, 0)][DBLP ] Conf ] Nicola Femia , Giovanni Petrone , Giovanni Spagnuolo , Massimo Vitelli One-cycle control of converters operating in DCM. [Citation Graph (0, 0)][DBLP ] Conf ] M. H.-Y. Liao , Duan-Yu Chen , Chih-Wen Sua , Hsiao-Rang Tyan Real-time event detection and its application to surveillance systems. [Citation Graph (0, 0)][DBLP ] Conf ] Sangho Shin , Kwyro Lee , Sung-Mo Kang 2.4GHz ZigBee radio architecture with fast frequency offset cancellation loop. [Citation Graph (0, 0)][DBLP ] Conf ] K. Ito , T. Shibata A time-domain gradient-detection architecture for VLSI analog motion sensors. [Citation Graph (0, 0)][DBLP ] Conf ] Eugenio Culurciello , Andreas Savvides Address-event image sensor network. [Citation Graph (0, 0)][DBLP ] Conf ] David Blaauw , Bo Zhai Energy efficient design for subthreshold supply voltage operation. [Citation Graph (0, 0)][DBLP ] Conf ] Kenny Johansson , Oscar Gustafsson , Lars Wanhammar Approximation of elementary functions using a weighted sum of bit-products. [Citation Graph (0, 0)][DBLP ] Conf ] S. C. Chan , Z. G. Zhang , Y. Zhou A new adaptive Kalman filter-based subspace tracking algorithm and its application to DOA estimation. [Citation Graph (0, 0)][DBLP ] Conf ] Viktor Gruev , Kejia Wu , Jan Van der Spiegel , Nader Engheta Fabrication of a thin film micro polarization array. [Citation Graph (0, 0)][DBLP ] Conf ] M. Jiménez , Antonio B. Torralba , Ramón González Carvajal , Jaime Ramírez-Angulo A new low-voltage CMOS unity-gain buffer. [Citation Graph (0, 0)][DBLP ] Conf ] Jordi Sacristán , Fredy Segura , M. Teresa Osés Bidirectional telemetry for implantable systems. [Citation Graph (0, 0)][DBLP ] Conf ] A. B. B. Adikari , Warnakulasuriya Anil Chandana Fernando , Hemantha Kodikara Arachchi A new motion and disparity vector prediction technique for H.264 based stereoscopic video coding. [Citation Graph (0, 0)][DBLP ] Conf ] Xingle Feng , Shihua Zhu , Pinyi Ren Hybrid order detection algorithm for V-BLAST system employing adaptive modulation. [Citation Graph (0, 0)][DBLP ] Conf ] Zhiming Xu , Anamitra Makur , Zhiping Lin Characterization and design of oversampled linear phase filterbanks with rational oversampling ratio. [Citation Graph (0, 0)][DBLP ] Conf ] Yan Chen , Oscar C. Au , Chi-Wang Ho , Jiantao Zhou Spatio-temporal boundary matching algorithm for temporal error concealment. [Citation Graph (0, 0)][DBLP ] Conf ] Marco Bucci , Luca Giancane , Raimondo Luzzi , Mario Varanonuovo , Alessandro Trifiletti A novel concept for stateless random bit generators in cryptographic applications. [Citation Graph (0, 0)][DBLP ] Conf ] I. Yamada , K. Slavakis , M. Yukawa , R. L. G. Cavalcante Adaptive projected subgradient method and its applications to robust signal processing. [Citation Graph (0, 0)][DBLP ] Conf ] Jean-Marc Philippe , E. Kinvi-Boh , Sébastien Pillement , Olivier Sentieys An energy-efficient ternary interconnection link for asynchronous systems. [Citation Graph (0, 0)][DBLP ] Conf ] Tsung-Han Tsai , Jia-Her Luo , Shih-Way Huang , Sung-Che Li Low complexity architecture design of MDCT-based psychoacoustic model for MPEG 2/4 AAC encoder. [Citation Graph (0, 0)][DBLP ] Conf ] Fei Xu , Chip-Hong Chang , Ching-Chuen Jong A new integrated approach to the design of low-complexity FIR filters. [Citation Graph (0, 0)][DBLP ] Conf ] Cameron T. Charles , David J. Allstot A 2-GHz integrated CMOS reflective-type phase shifter with 675° control range. [Citation Graph (0, 0)][DBLP ] Conf ] E. Lazaridis , Emmanuel M. Drakakis , M. Barahona A biomimetic CMOS synapse. [Citation Graph (0, 0)][DBLP ] Conf ] S. H. Zhao , S. C. Chan Robust design of hybrid filter bank A/D converters using second order cone programming. [Citation Graph (0, 0)][DBLP ] Conf ] Christian Falconi , Gianluca Giustolisi Analysis of power supply gain of CMOS bandgap references. [Citation Graph (0, 0)][DBLP ] Conf ] Edward K. Lee , Eusebiu Matei , Ravi S. Ananth A 0.9 V rail-to-rail constant gm amplifier for implantable biomedical applications. [Citation Graph (0, 0)][DBLP ] Conf ] E. Martens , G. Gielen A behavioral model of sampled-data systems in the phase-frequency transfer domain for architectural exploration of transceivers. [Citation Graph (0, 0)][DBLP ] Conf ] H. Dine , S. Chuang , Phillip E. Allen , Paul E. Hasler A rail to rail, slew-boosted pre-charge buffer. [Citation Graph (0, 0)][DBLP ] Conf ] Shilin Xu , Guangxi Zhu , Li Yu , Chunhui Cui Probability updating-based adaptive hybrid coding (PUAHC). [Citation Graph (0, 0)][DBLP ] Conf ] Yongjian Tang , Hans Hegt , Arthur H. M. van Roermund DDL-based calibration techniques for timing errors in current-steering DACs. [Citation Graph (0, 0)][DBLP ] Conf ] Jagdish Chandra Patra , Ee-Luang Ang , Pramod Kumar Meher A novel neural network-based linearization and auto-compensation technique for sensors. [Citation Graph (0, 0)][DBLP ] Conf ] N. Deparis , C. Loyez , N. Rolland , P.-A. Rolland Pulse generator for UWB communication and radar applications with PPM and time hopping possibilities. [Citation Graph (0, 0)][DBLP ] Conf ] Shiann-Shiun Jeng , Hsing-Chen Lin , Shu-Ming Chang FPGA implementation of FIR filter using M-bit parallel distributed arithmetic. [Citation Graph (0, 0)][DBLP ] Conf ] Ke-Zhao Chen , Yao-Jen Chang , Chia-Wen Lin Video-based face authentication using appearance models and HMMs. [Citation Graph (0, 0)][DBLP ] Conf ] Dimitris Agrafiotis , David R. Bull , Cedric Nishan Canagarajah Enhanced spatial error concealment with directional entropy based interpolation switching. [Citation Graph (0, 0)][DBLP ] Conf ] Viktor Gruev , Jan Van der Spiegel , Nader Engheta Image sensor with focal plane extraction of polarimetric information. [Citation Graph (0, 0)][DBLP ] Conf ] Ricardo Merched , Are Hjørungnes Innovations approach to MMSE waterfilling based equalizers. [Citation Graph (0, 0)][DBLP ] Conf ] Magnus Karlsson , Mark Vesterbacka Digit-serial/parallel multipliers with improved throughput and latency. [Citation Graph (0, 0)][DBLP ] Conf ] Quoc-Hoang Duong , T.-J. Park , E.-J. Kim , Sang-Gug Lee An all CMOS 743 MHz variable gain amplifier for UWB systems. [Citation Graph (0, 0)][DBLP ] Conf ] Sheng-Yu Peng , Muhammad S. Qureshi , Paul E. Hasler , N. A. Hall , F. L. Degertekin High SNR capacitive sensing transducer. [Citation Graph (0, 0)][DBLP ] Conf ] Erlin Zeng , Shihua Zhu , Xuewen Liao Grouped multiuser diversity in multiuser MIMO systems exploiting spatial multiplexing. [Citation Graph (0, 0)][DBLP ] Conf ] Xin Dai , Degang Chen , Randall L. Geiger Explicit characterization of bandgap references. [Citation Graph (0, 0)][DBLP ] Conf ] Chip-Hong Chang , Jiajia Chen , A. Prasad Vinod Maximum likelihood disjunctive decomposition to reduced multirooted DAG for FIR filter design. [Citation Graph (0, 0)][DBLP ] Conf ] Hao Liu , Wenjun Zhang , Xiaokang Yang Error-resilience packet scheduling for low bit-rate video streaming over wireless channels. [Citation Graph (0, 0)][DBLP ] Conf ] Hua-Lung Yang , Wen-Rong Wu Low-complexity adaptive array for DS/CDMA code acquisition. [Citation Graph (0, 0)][DBLP ] Conf ] Chia-Chi Chu , Ming-Hong Lai , Wu-Shiung Feng The global Lanczos method for MIMO interconnect order reductions. [Citation Graph (0, 0)][DBLP ] Conf ] S. S. Yin , S. C. Chan , X. M. Xie On the theory and design of a class of recombination nonuniform filter banks with low-delay FIR and IIR filters. [Citation Graph (0, 0)][DBLP ] Conf ] Chon-In Lao , Seng-Pan U. , Rui Paulo Martins A novel effective bandpass semi-MASH sigma-delta modulator with double-sampling mismatch-free resonator. [Citation Graph (0, 0)][DBLP ] Conf ] Ralf M. Philipp , Ralph Etienne-Cummings A second-generation single-chip stereo imager. [Citation Graph (0, 0)][DBLP ] Conf ] Chia-Chun Tsai , Jan-Ou Wu , Chien-Wen Kao , Trong-Yen Lee , Rong-Shue Hsiao Coupling aware RLC-based clock routings for crosstalk minimization. [Citation Graph (0, 0)][DBLP ] Conf ] Antonio J. López-Martín , Alfonso Carlosena , Jaime Ramírez-Angulo , Ramón González Carvajal Rail-to-rail tunable CMOS V-I converter. [Citation Graph (0, 0)][DBLP ] Conf ] David B. H. Tay On the regularity of orthonormal wavelets designed via the zero-pinning technique. [Citation Graph (0, 0)][DBLP ] Conf ] Shunsuke Koshita , Masahide Abe , Masayuki Kawamata Gramian-preserving frequency transformation for linear continuous-time state-space systems. [Citation Graph (0, 0)][DBLP ] Conf ] D. J. Hill , Guanrong Chen Power systems as dynamic networks. [Citation Graph (0, 0)][DBLP ] Conf ] Chika O. Nwankpa , A. S. Deese , Qingyan Liu , Aaron St. Leger , J. Yakaski Power system on a chip (PSoC). [Citation Graph (0, 0)][DBLP ] Conf ] Peter J. Langlois , Andreas Demosthenous Possible benefits of moderate inversion for MOSFET transconductors. [Citation Graph (0, 0)][DBLP ] Conf ] R. Barsatan , Tsz Yin Man , Mansun Chan A zero-mask one-time programmable memory array for RFID applications. [Citation Graph (0, 0)][DBLP ] Conf ] Siew-Chong Tan , Y. M. Lai , C. K. Tse A family of PWM based sliding mode voltage controllers for basic DC-DC converters. [Citation Graph (0, 0)][DBLP ] Conf ] Chung-Hsien Hua , Chi-Wei Peng , Wei Hwang A noise-tolerant matchline scheme with XOR-based conditional keeper for energy-efficient TCAM. [Citation Graph (0, 0)][DBLP ] Conf ] Mark Pude , Clyde Washburn , Ponnathpur R. Mukund , Kouichi Abe , Yoshinori Nishi An analytical propagation delay model with power supply noise effects. [Citation Graph (0, 0)][DBLP ] Conf ] D. J. Krusienski , W. Kenneth Jenkins A modified particle swarm optimization algorithm for adaptive filtering. [Citation Graph (0, 0)][DBLP ] Conf ] P. Ziska , J. Vrbata Method for design of analog group delay equalizers. [Citation Graph (0, 0)][DBLP ] Conf ] George Economakos Behavioral synthesis with SystemC and PSL assertions for interface specification. [Citation Graph (0, 0)][DBLP ] Conf ] Jin Lee , Sin-Chong Park , Sungchung Park A pipelined VLSI architecture for a list sphere decoder. [Citation Graph (0, 0)][DBLP ] Conf ] Sang-Min Yoo , Tae-Hwan Oh , Ho-Young Lee , Kyung-Ho Moon , Jae-Whui Kim A 3.0V 12b 120 Msample/s CMOS pipelined ADC. [Citation Graph (0, 0)][DBLP ] Conf ] S. Miller , Leonard MacEachern A nanowatt bandgap voltage reference for ultra-low power applications. [Citation Graph (0, 0)][DBLP ] Conf ] Yunan Xiang , R. Pettibon , Martin Margala A versatile computation module for adaptable multimedia processors. [Citation Graph (0, 0)][DBLP ] Conf ] Alain Vachoux , Christoph Grimm , Ralf Kakerow , Christian Meise Embedded mixed-signal systems: new challenges for modeling and simulation. [Citation Graph (0, 0)][DBLP ] Conf ] G. Souliotis , K. Giannakopoulos , N. Fragoulis A current-mode chaotic oscillator. [Citation Graph (0, 0)][DBLP ] Conf ] Hing-mo Lam , Chi-Ying Tsui High performance single clock cycle CMOS comparator. [Citation Graph (0, 0)][DBLP ] Conf ] P. Georgiou , Christofer Toumazou Towards an ultra low power chemically inspired electronic beta cell for diabetes. [Citation Graph (0, 0)][DBLP ] Conf ] Rafael Serrano-Gotarredona , Bernabé Linares-Barranco , Teresa Serrano-Gotarredona , A. Acosta-Jimenez , Alejandro Linares-Barranco , R. Paz-Vicente , F. Gomez-Rodriguez High-speed image processing with AER-based components. [Citation Graph (0, 0)][DBLP ] Conf ] Guang-Hua Yang , Dongxu Shen , Victor O. K. Li Unequal error protection for MIMO systems with a hybrid structure. [Citation Graph (0, 0)][DBLP ] Conf ] Stefano Vitali , Riccardo Rovatti , Gianluca Setti Improving PA efficiency by chaos-based spreading in multicarrier DS-CDMA systems. [Citation Graph (0, 0)][DBLP ] Conf ] Ying Yu , Raymond R. Hoare , Alex K. Jones , Ralph Sprang A hybrid encoding scheme for efficient single-cycle range matching in content addressable memory. [Citation Graph (0, 0)][DBLP ] Conf ] Janne Maunu , Mikko Pänkäälä , J. Marku , Jonne Poikonen , Mika Laiho , Ari Paasio Current source calibration by combination selection of minimum sized devices. [Citation Graph (0, 0)][DBLP ] Conf ] L. Codecasa , Dario D'Amore , Paolo Maffezzoni Parametric compact models by directional moment matching. [Citation Graph (0, 0)][DBLP ] Conf ] Mauro Forti , Massimo Grazzini , Paolo Nistri , Luca Pancioni A result on global convergence in finite time for nonsmooth neural networks. [Citation Graph (0, 0)][DBLP ] Conf ] Yiming Zhai , S. B. Prakash , Marc H. Cohen , Pamela Abshire Detection of on-chip temperature gradient using a 1.5V low power CMOS temperature sensor. [Citation Graph (0, 0)][DBLP ] Conf ] Juraci Ferreira Galdino , J. A. Apolinário Jr. , Marcello L. R. de Campos A set-membership NLMS algorithm with time-varying error bound. [Citation Graph (0, 0)][DBLP ] Conf ] Jinhu Lu , K. Murali , S. Sinha , Henry Leung Generating multi-scroll chaotic attractors via threshold control. [Citation Graph (0, 0)][DBLP ] Conf ] Xiaolin Hu , Jun Wang Global stability of a recurrent neural network for solving pseudomonotone variational inequalities. [Citation Graph (0, 0)][DBLP ] Conf ] V. S. Sheeba , Elizabeth Elias Design of signal-adapted nonuniform filter banks using tree structure. [Citation Graph (0, 0)][DBLP ] Conf ] Yongxin Ma , Xiaoyang Zeng , Min Wu , Chengshou Sun A new low cost and reconfigurable RSA crypto-processor. [Citation Graph (0, 0)][DBLP ] Conf ] R. Tortosa , José Manuel de la Rosa , Ángel Rodríguez-Vázquez , Francisco V. Fernández Design of a 1.2-V cascade continuous-time Delta Sigma modulator for broadband telecommunications. [Citation Graph (0, 0)][DBLP ] Conf ] Radu M. Secareanu , Olin L. Hartin Low power architectures using localised non-volatile memory and selective power shut-down. [Citation Graph (0, 0)][DBLP ] Conf ] Mariane R. Petraglia , Paulo B. Batalheiro Non-uniform subband adaptive filtering with critical sampling. [Citation Graph (0, 0)][DBLP ] Conf ] Aránzazu Otín , Santiago Celma , Concepción Aldea A design strategy for VHF filters with digital programmability. [Citation Graph (0, 0)][DBLP ] Conf ] M. O. Shaker , Soliman A. Mahmoud , Ahmed M. Soliman New CMOS fully differential transconductor and its application. [Citation Graph (0, 0)][DBLP ] Conf ] Chris van den Bos , Luís Bica Oliveira , Jorge R. Fernandes , Chris J. M. Verhoeven A 5-GHz combined oscillator/mixer. [Citation Graph (0, 0)][DBLP ] Conf ] Dale Joachim , R. Salmon , John R. Deller Jr. Set-membership filtering strategies for multipulse coding. [Citation Graph (0, 0)][DBLP ] Conf ] Xiaoning Lu , K. C. Ho Taylor-series technique for moving source localization in the presence of sensor location errors. [Citation Graph (0, 0)][DBLP ] Conf ] Mobien Shoaib , Stefan Werner , J. A. Apolinário Jr. , Timo I. Laakso Equivalent output-filtering using fast QRD-RLS algorithm for burst-type training applications. [Citation Graph (0, 0)][DBLP ] Conf ] Yong Sin Kim , Sangho Shin , Sung-Mo Kang A 4-Gb/s/pin current mode 4-level simultaneous bidirectional I/O with current mismatch calibration. [Citation Graph (0, 0)][DBLP ] Conf ] Gülin Tulunay , Sina Balkir Automatic synthesis of CMOS RF front-ends. [Citation Graph (0, 0)][DBLP ] Conf ] Xiao Liu , Andreas Demosthenous , Nick Donaldson A stimulator output stage with capacitor reduction and failure-checking techniques. [Citation Graph (0, 0)][DBLP ] Conf ] Sen-Wen Hsiao , Yen-Chih Huang , David Liang , H.-W. K. Chen , Hsin-Shu Chen A 1.5-V 10-ppm/°C 2nd-order curvature-compensated CMOS bandgap reference with trimming. [Citation Graph (0, 0)][DBLP ] Conf ] Jennifer Blain Christen , Andreas G. Andreou Hybrid silicon/silicone (polydimethylsiloxane) microsystem for cell culture. [Citation Graph (0, 0)][DBLP ] Conf ] Mohammad Taherzadeh-Sani , Anas A. Hamoui Digital background calibration of interstage-gain and capacitor-mismatch errors in pipelined ADCs. [Citation Graph (0, 0)][DBLP ] Conf ] Takahashi Tokuda , David C. Ng , A. Yamamoto , Keiichiro Kagawa , Masahiro Nunoshita , Jun Ohta An optical and potential dual-image CMOS sensor for on-chip neural and DNA imaging applications. [Citation Graph (0, 0)][DBLP ] Conf ] A. Prasad Vinod , A. Singla , Chip-Hong Chang Improved differential coefficients-based low power FIR filters. Part I. Fundamentals. [Citation Graph (0, 0)][DBLP ] Conf ] Tae-Hwan Oh , Sang-Min Yoo , Kyoung-Ho Moon , Jae-Whui Kim A 3.0 V 72mW 10b 100 MSample/s Nyquist-rate CMOS pipelined ADC in 0.54 mm2 . [Citation Graph (0, 0)][DBLP ] Conf ] Ming-Hong Lai , Chia-Chi Chu , Wu-Shiung Feng MIMO interconnects order reductions by using the global Arnoldi algorithm. [Citation Graph (0, 0)][DBLP ] Conf ] Mohammad Yavari , Omid Shoaei , Ángel Rodríguez-Vázquez Double-sampled cascaded sigma-delta modulator topologies for low oversampling ratios. [Citation Graph (0, 0)][DBLP ] Conf ] Saad Bouguezel , M. Omair Ahmad , M. N. S. Swamy An efficient algorithm for the computation of the reverse jacket transform. [Citation Graph (0, 0)][DBLP ] Conf ] Yongyi Wu , Xiaoyang Zeng A new dual-field elliptic curve cryptography processor. [Citation Graph (0, 0)][DBLP ] Conf ] Zhiqiang Gao , Mingyan Yu , Yizheng Ye , Jianguo Ma A CMOS bandpass filter with wide-tuning range for wireless applications. [Citation Graph (0, 0)][DBLP ] Conf ] YongKang Zhu , David H. Albonesi Localized microarchitecture-level voltage management. [Citation Graph (0, 0)][DBLP ] Conf ] Jenq-Neng Hwang , Ibrahim Karliga , H.-Y. Cheng An automatic three-dimensional human behavior analysis system for video surveillance applications. [Citation Graph (0, 0)][DBLP ] Conf ] Chih-Jen Cheng , Shuenn-Yuh Lee A low-voltage adaptive switched-current SDM for bio-acquisition microsystems. [Citation Graph (0, 0)][DBLP ] Conf ] Xiang Xie , GuoLin Li , Zhihua Wang A new VLSI structure for an improved near-lossless color image compression algorithm inside wireless endoscopy capsule. [Citation Graph (0, 0)][DBLP ] Conf ] James E. Stine , Nitin Naresh Compressed symmetric tables for accurate function approximation of reciprocals. [Citation Graph (0, 0)][DBLP ] Conf ] Hong-Yi Huang , Bo-Ruei Wang , Jen-Chieh Liu High-gain and high-bandwidth rail-to-rail operational amplifier with slew rate boost circuit. [Citation Graph (0, 0)][DBLP ] Conf ] Hold Omid Rajaee , A. Jahanian , Mehrdad Sharif Bakhtiar A low voltage, high speed, high resolution class AB switched current sample and hold. [Citation Graph (0, 0)][DBLP ] Conf ] W. Nakamura , S. Koyama , S. Kuriki , Y. Inouye Estimation of current density distributions from EEG/MEG data by maximizing sparseness of spatial difference. [Citation Graph (0, 0)][DBLP ] Conf ] Kostas Masselos , Yiannis Andreopoulos , Thanos Stouraitis Execution time comparison of lifting-based 2D wavelet transforms implementations on a VLIW DSP. [Citation Graph (0, 0)][DBLP ] Conf ] Paolo Arena , Luigi Fortuna , Mattia Frasca , Luca Patané , M. Pavone Towards autonomous adaptive behavior in a bio-inspired CNN-controlled robot. [Citation Graph (0, 0)][DBLP ] Conf ] Christian Niederhöfer , Ronald Tetzlaff Detection of a preseizure state in epilepsy: signal prediction by maximally weakly nonlinear networks? [Citation Graph (0, 0)][DBLP ] Conf ] Ping-Ying Wang , C.-H. Chou , Hsueh-Wu Kao Chaos in delay locked loop. [Citation Graph (0, 0)][DBLP ] Conf ] Rajesh Tiruvuru , Shanthi Pavan Transmission line based FIR structures for high speed adaptive equalization. [Citation Graph (0, 0)][DBLP ] Conf ] Svante Signell , M. Uddin Shaber High-speed pipelined DAC architecture using Gray coding. [Citation Graph (0, 0)][DBLP ] Conf ] Hirotaka Koizumi , Kosuke Kurokawa , Shinsaku Mori A comparison of output envelope waveforms of the delta-sigma modulated class D series resonant inverter. [Citation Graph (0, 0)][DBLP ] Conf ] Volnei A. Pedroni Phase sampling: a new approach to the design of LF direct digital frequency synthesizers. [Citation Graph (0, 0)][DBLP ] Conf ] Jun Tao , Xuan Zeng , Fan Yang , Yangfeng Su , Lihong Feng , Wei Cai , Dian Zhou , Charles Chiang A one-shot projection method for interconnects with process variations. [Citation Graph (0, 0)][DBLP ] Conf ] L. Acosta , Ramón González Carvajal , M. Jiménez , Jaime Ramírez-Angulo , Antonio J. López-Martín A CMOS transconductor with 90 dB SFDR and low sensitivity to mismatch. [Citation Graph (0, 0)][DBLP ] Conf ] Soo-Chang Pei , Jian-Jiun Ding Improved reversible integer transform. [Citation Graph (0, 0)][DBLP ] Conf ] F. Sobhanmanesh , Saeid Nooshabadi VLSI architecture for 4×4 16-QAM V-BLAST decoder. [Citation Graph (0, 0)][DBLP ] Conf ] Victor Sutan , Jason Cardillo , Ching-Yung Lin Developing smart video semantic sensors. [Citation Graph (0, 0)][DBLP ] Conf ] Fangjiong Chen , Sam Kwong , Chi-Wah Kok Two-dimensional angle and polarization estimation using ESPRIT without pairing. [Citation Graph (0, 0)][DBLP ] Conf ] Paul Ampadu Ultra-low voltage VLSI: are we there yet? [Citation Graph (0, 0)][DBLP ] Conf ] Timothy G. Constandinou , Chris Toumazou A micropower vision processor for parallel object positioning and sizing. [Citation Graph (0, 0)][DBLP ] Conf ] Massimo Panella , Maurizio Paschero , Fabio Massimo Frattale Mascioli Symbolic analysis and optimization of piezo-electromechanical systems. [Citation Graph (0, 0)][DBLP ] Conf ] Xiaolong Li , Wouter A. Serdijn , B. E. M. Woestenburg , J. G. bij de Vaate A broadband indirect-feedback power-to-current LNA. [Citation Graph (0, 0)][DBLP ] Conf ] Luis Nero Alves , Luis Barbosa , E. A. L. Macedo , Rui L. Aguiar General model for delayed feedback and its application to transimpedance amplifier's bandwidth optimization. [Citation Graph (0, 0)][DBLP ] Conf ] M. B. Vahidfar , Omid Shoaei , M. Fardis A low power, transverse analog FIR filter for feed forward equalization of gigabit Ethernet. [Citation Graph (0, 0)][DBLP ] Conf ] Bo Hu , C.-J. Richard Shi Improved automatic differentiation method for efficient model compiler. [Citation Graph (0, 0)][DBLP ] Conf ] Stefan Werner , Paulo S. R. Diniz , Jose E. W. Moreira Set-membership affine projection algorithm with variable data-reuse factor. [Citation Graph (0, 0)][DBLP ] Conf ] Cicilia C. Lozano , Bogdan J. Falkowski , S. Rahardia Algorithms for generation of quaternary fixed polarity arithmetic spectra. [Citation Graph (0, 0)][DBLP ] Conf ] Indrajit Ahmed , Tughrul Arslan A low energy VLSI design of random block interleaver for 3GPP turbo decoding. [Citation Graph (0, 0)][DBLP ] Conf ] J. Izydorczyk An algorithm for optimal terms allocation for fixed point coefficients of FIR filter. [Citation Graph (0, 0)][DBLP ] Conf ] F. Kashfi , Seid Mehdi Fakhraie Implementation of a high-speed low-power 32-bit adder in 70nm technology. [Citation Graph (0, 0)][DBLP ] Conf ] Ming-Der Shieh , Yung-Kuei Lu , Shen-Ming Chung , Jun-Hong Chen Design and implementation of efficient Reed-Solomon decoders for multi-mode applications. [Citation Graph (0, 0)][DBLP ] Conf ] Chun-Yang Chen , P. P. Vaidyanathan Precoded V-BLAST for ISI MIMO channels. [Citation Graph (0, 0)][DBLP ] Conf ] Jooyoung Kim , Kangmin Lee , Hoi-Jun Yoo A 372 ps 64-bit adder using fast pull-up logic in 0.18µm CMOS. [Citation Graph (0, 0)][DBLP ] Conf ] William R. Roberts , Dimitrios Velenis Power supply variation effects on timing characteristics of clocked registers. [Citation Graph (0, 0)][DBLP ] Conf ] Junho Cho , Hoseok Chang , Wonyong Sung An FPGA based SIMD processor with a vector memory unit. [Citation Graph (0, 0)][DBLP ] Conf ] Magdy A. El-Moursy , Eby G. Friedman Optimum wire tapering for minimum power dissipation in RLC interconnects. [Citation Graph (0, 0)][DBLP ] Conf ] Gang Wang , Huaguang Zhang , Derong Liu Global exponential stability of generalized neural networks with time-varying delays. [Citation Graph (0, 0)][DBLP ] Conf ] Jaswinder Lota , Mohammed Al-Janabi , Izzet Kale Stability analysis of higher-order delta-sigma modulators using the describing function method. [Citation Graph (0, 0)][DBLP ] Conf ] Ashutosh Chakraborty , K. Duraisami , Ashoka Visweswara Sathanur , Prassanna Sithambaram , Alberto Macii , Enrico Macii , Massimo Poncino Implications of ultra low-voltage devices on design techniques for controlling leakage in NanoCMOS circuits. [Citation Graph (0, 0)][DBLP ] Conf ] D. Cafagna , G. Grassi Hyperchaotic 3D-scroll attractors via Hermite polynomials: the Adomian decomposition approach. [Citation Graph (0, 0)][DBLP ] Conf ] Joongho Choi , Jinup Lim , Cheng-Chew Lim A low-voltage operational amplifier with high slew-rate for sigma-delta modulators. [Citation Graph (0, 0)][DBLP ] Conf ] Jih-Sheng Shen , Kuei-Chung Chang , Tien-Fu Chen On a design of crossroad switches for low-power on-chip communication architectures. [Citation Graph (0, 0)][DBLP ] Conf ] Ivan V. Bajic Non-causal error control for wireless video streaming with noncoherent signaling. [Citation Graph (0, 0)][DBLP ] Conf ] Kwang-Il Oh , Seunghyun Cho , Lee-Sup Kim A low power SoC bus with low-leakage and low-swing technique. [Citation Graph (0, 0)][DBLP ] Conf ] Lei Wang , Shuo Wang Adaptive timing for analysis of skew tolerance. [Citation Graph (0, 0)][DBLP ] Conf ] Yu Shao , Chip-Hong Chang A Kalman filter based on wavelet filter-bank and psychoacoustic modeling for speech enhancement. [Citation Graph (0, 0)][DBLP ] Conf ] Shuenn-Yuh Lee , Chia-Chyang Chen , Shyh-Chyang Lee , Chih-Jen Cheng A low-power VLSI architecture for a shared-memory FFT processor with a mixed-radix algorithm and a simple memory control scheme. [Citation Graph (0, 0)][DBLP ] Conf ] V. Giannini , Jan Craninckx , J. Compiet , Boris Come , Stefano D'Amico , Andrea Baschirotto Fully reconfigurable active-Gm-RC biquadratic cells for software defined radio applications. [Citation Graph (0, 0)][DBLP ] Conf ] Tamás Roska , Dávid Bálya , A. Lazar , K. Karacs , R. Wagner , M. Szuhaj System aspects of a bionic eyeglass. [Citation Graph (0, 0)][DBLP ] Conf ] Zhiying Wang , Chen He A minimum transmission power AM-MIMO system. [Citation Graph (0, 0)][DBLP ] Conf ] Christal Gordon , Amanda Preyer , Karolyn Babalola , Robert J. Butera , Paul E. Hasler An artificial synapse for interfacing to biological neurons. [Citation Graph (0, 0)][DBLP ] Conf ] P. T. Krasopoulos , N. G. Maratos A neural network for convex optimization. [Citation Graph (0, 0)][DBLP ] Conf ] Suryanarayana Tatapudi , José G. Delgado-Frias A mesochronous pipeline scheme for high performance low power digital systems. [Citation Graph (0, 0)][DBLP ] Conf ] A. Maltsev , V. Pestretsov , R. Maslennikov , A. Khoryaev Triangular systolic array with reduced latency for QR-decomposition of complex matrices. [Citation Graph (0, 0)][DBLP ] Conf ] Simin Yu , Jinhu Lu , Guanrong Chen Experimental confirmation of n-scroll hyperchaotic attractors. [Citation Graph (0, 0)][DBLP ] Conf ] Soumyajit Mandal , Scott K. Arfin , Rahul Sarpeshkar Fast startup CMOS current references. [Citation Graph (0, 0)][DBLP ] Conf ] Sangho Shin , Kwyro Lee , Sung-Mo Kang Low-power 2.4GHz CMOS frequency synthesizer with differentially controlled MOS varactors. [Citation Graph (0, 0)][DBLP ] Conf ] Daewook Kim , Manho Kim , Gerald E. Sobelman DCOS: cache embedded switch architecture for distributed shared memory multiprocessor SoCs. [Citation Graph (0, 0)][DBLP ] Conf ] Kiyoo Itoh , Masashi Horiguchi , Takayuki Kawahara Ultra-low voltage nano-scale embedded RAMs. [Citation Graph (0, 0)][DBLP ] Conf ] Micah O'Halloran , Rahul Sarpeshkar An analog storage cell with 5e- /sec leakage. [Citation Graph (0, 0)][DBLP ] Conf ] Pengfei Li , Rizwan Bashirullah , José Carlos Príncipe A low power battery management system for rechargeable wireless implantable electronics. [Citation Graph (0, 0)][DBLP ] Conf ] Hio Leong Chao , Dongsheng Ma CMOS variable-gain wide-bandwidth CMFB-free differential current feedback amplifier for ultrasound diagnostic applications. [Citation Graph (0, 0)][DBLP ] Conf ] Sizhong Chen , Tong Zhang , M. Goel Relaxed tree search MIMO signal detection algorithm design and VLSI implementation. [Citation Graph (0, 0)][DBLP ] Conf ] A. Jha , Ranjit Gharpurey , Peter R. Kinget Quadrature-DAC based pulse generation for UWB pulse radio transceivers. [Citation Graph (0, 0)][DBLP ] Conf ] J. Tapson Supercritical stability in a sonar receiver circuit. [Citation Graph (0, 0)][DBLP ] Conf ] Tommaso Addabbo , Massimo Alioto , Ada Fort , Santina Rocchi , Valerio Vignoli A technique to design high entropy chaos-based true random bit generators. [Citation Graph (0, 0)][DBLP ] Conf ] Rong-Jian Chen , Yi-Te Lai , Jui-Lin Lai Architecture design and VLSI hardware implementation of image encryption/decryption system using re-configurable 2D Von Neumann cellular automata. [Citation Graph (0, 0)][DBLP ] Conf ] S. Akatsu , Hiroyuki Torikai , Toshimichi Saito Current-mode instantaneous state setting method and its application to an H-bridge inverter. [Citation Graph (0, 0)][DBLP ] Conf ] Wai-Chi Fang Lossless data compression core design for integrated space data and communication system-on-chip. [Citation Graph (0, 0)][DBLP ] Conf ] Anthony J. Lawrance Is there life after bit error rate or before? [Citation Graph (0, 0)][DBLP ] Conf ] K. Allidina , Shahriar Mirabbasi A widely tunable active RF filter topology. [Citation Graph (0, 0)][DBLP ] Conf ] Zhaohui Cai , Jianzhong Hao , Sumei Sun , Francois Poshin Chin A high-speed Reed-Solomon decoder for correction of both errors and erasures. [Citation Graph (0, 0)][DBLP ] Conf ] Kazuhiro Shimonomura , Tetsuya Yagi Texture segregation employing orientation-selective analog multi-chip vision system. [Citation Graph (0, 0)][DBLP ] Conf ] Z. G. Zhang , S. C. Chan A new Kalman filter-based algorithm for adaptive coherence analysis of non-stationary multichannel time series. [Citation Graph (0, 0)][DBLP ] Conf ] Pramod Kumar Meher , Jagdish Chandra Patra A new approach to secure distributed storage, sharing and dissemination of digital image. [Citation Graph (0, 0)][DBLP ] Conf ] Nenad Stevanovic , Jesper Engvall , Christian Mueller , Juergen Oehm A temperature compensated linear output RF amplifier with programmable gain control. [Citation Graph (0, 0)][DBLP ] Conf ] Junwei Zhou , Andrew Mason A two-level hybrid select logic for wide-issue superscalar processors. [Citation Graph (0, 0)][DBLP ] Conf ] Alkis A. Hatzopoulos , Stefanos Stefanou , Georges G. E. Gielen , Dominique Schreurs Assessment of parameter extraction methods for integrated inductor design and model validation. [Citation Graph (0, 0)][DBLP ] Conf ] Danjue Li , Qian Zhang , Chen-Nee Chuah , S. J. Ben Yoo Multi-source multi-path video streaming over wireless mesh networks. [Citation Graph (0, 0)][DBLP ] Conf ] Shiguo Lian , Zhongxuan Liu , Zhen Ren , Haila Wang Hash function based on chaotic neural networks. [Citation Graph (0, 0)][DBLP ] Conf ] Yibo Wang , Yici Cai , Xianlong Hong Performance and power aware buffered tree construction. [Citation Graph (0, 0)][DBLP ] Conf ] M. O. Shaker , Soliman A. Mahmoud , Ahmed M. Soliman A CMOS fifth-order low-pass current-mode filter using a linear transconductor. [Citation Graph (0, 0)][DBLP ] Conf ] Sungchung Park , Kwyro Lee , Sin-Chong Park Efficient probabilistic sphere decoding architecture. [Citation Graph (0, 0)][DBLP ] Conf ] Tadashi Suetsugu , Marian K. Kazimierczuk Sub-optimum operation of class E amplifier with nonlinear shunt capacitance at any duty cycle. [Citation Graph (0, 0)][DBLP ] Conf ] G. Reza Chaji , Arokia Nathan High-precision, fast current source for large-area current-programmed a-Si flat panels. [Citation Graph (0, 0)][DBLP ] Conf ] Wei-Hsiang Cheng , Chin-Lung Chuang , Chien-Nan Jimmy Liu An efficient mechanism to provide full visibility for hardware debugging. [Citation Graph (0, 0)][DBLP ] Conf ] Ferdinando Bedeschi , C. Boffmo , Edoardo Bonizzoni , Claudio Resta , Guido Torelli , Daniele ZelLa Set-sweep programming pulse for phase-change memories. [Citation Graph (0, 0)][DBLP ] Conf ] Songping Mai , Kun Yang , Wenli Lan , Chun Zhang , Zhihua Wang An open-source based DSP with enhanced multimedia-processing capacity for embedded applications. [Citation Graph (0, 0)][DBLP ] Conf ] Paul Kucher , Shantanu Chakrabartty An adaptive CMOS imager with time-based compressive active-pixel response. [Citation Graph (0, 0)][DBLP ] Conf ] A. Al Ghouwayel , Y. Louet , Jacques Palicot A reconfigurable architecture for the FFT operator in a software radio context. [Citation Graph (0, 0)][DBLP ] Conf ] D. Grabowski , C. Grimm , E. Barke Semi-symbolic modeling and simulation of circuits and systems. [Citation Graph (0, 0)][DBLP ] Conf ] Jin-Tai Yan , Bo-Yi Chiang , Chia-Fang Lee Timing-constrained yield-driven wire sizing for critical area minimization. [Citation Graph (0, 0)][DBLP ] Conf ] S. Phrompichai , Peerapol Yuvapoositanon A semiblind receiver based upon multiple constrained subspace MUD for long-code downlink multirate DS-CDMA systems. [Citation Graph (0, 0)][DBLP ] Conf ] S. Kozic , M. Hasler Belief propagation decoding for codes based on discretized chaotic maps. [Citation Graph (0, 0)][DBLP ] Conf ] R. Costa-Castello , E. Fossas On discretizing linear passive controllers. [Citation Graph (0, 0)][DBLP ] Conf ] Michael Sotman , Avinoam Kolodny , Mikhail Popovich , Eby G. Friedman On-die decoupling capacitance: frequency domain analysis of activity radius. [Citation Graph (0, 0)][DBLP ] Conf ] Samy M. Boshra , Hazem M. Abbas , Ahmed M. Darwish , Ihab E. Talkhan Performance and routability improvements for routability-driven FPGA routers. [Citation Graph (0, 0)][DBLP ] Conf ] M. Wenk , M. Zellweger , Andreas Burg , Norbert Felber , Wolfgang Fichtner K-best MIMO detection VLSI architectures achieving up to 424 Mbps. [Citation Graph (0, 0)][DBLP ] Conf ] Xin Cai , Martin A. Brooke A compact CPU architecture for sensor signal processing. [Citation Graph (0, 0)][DBLP ] Conf ] Glauco Borges Valim dos Santos , Marcelo de Oliveira Johann , Ricardo Augusto da Luz Reis Channel based routing in channel-less circuits. [Citation Graph (0, 0)][DBLP ] Conf ] R. Morales-Ramos , J. Sosa , Juan A. Montiel-Nelson , A. Zwick , X. P. Nguyen Movement recognition and strain lecture algorithm for fracture monitoring system. [Citation Graph (0, 0)][DBLP ] Conf ] Giorgos Dimitrakopoulos , Christos Mavrokefalidis , Costas Galanopoulos , Dimitris Nikolos Fast bit permutation unit for media enhanced microprocessors. [Citation Graph (0, 0)][DBLP ] Conf ] Ali Davoudi , Juri Jatskevich State-space averaging of switched-inductor-cell for PWM dc-dc converters considering conduction losses in both operational modes. [Citation Graph (0, 0)][DBLP ] Conf ] Rama Sangireddy Fast and low-power processor front-end with reduced rename logic circuit complexity. [Citation Graph (0, 0)][DBLP ] Conf ] E. Vournas , N. Sakellaridis , M. Karystianos , N. G. Maratos Investigating power system stability limits. [Citation Graph (0, 0)][DBLP ] Conf ] Rajsekhar Adapa , Spyros Tragoudas , Maria K. Michael Sub-faults identification for collapsing in diagnosis. [Citation Graph (0, 0)][DBLP ] Conf ] Kyoung-Hoi Koo , Soo-Kyung Lee , Jin-Ho Seo , Myeong-Lyong Ko , Jae-Whui Kim A versatile I/O with robust impedance calibration for various memory interfaces. [Citation Graph (0, 0)][DBLP ] Conf ] Ville Saari , Jussi Ryynänen , J. Mustola , Kari Halonen , Jarkko Jussila A 10-MHz channel-select filter for a multicarrier WCDMA base-station. [Citation Graph (0, 0)][DBLP ] Conf ] A. Tsuneda Chaotic p-ary sequences with exponential auto-correlation properties based on piecewise linear maps. [Citation Graph (0, 0)][DBLP ] Conf ] Michael Kropfitsch , Philipp Riess , Gerhard Knoblinger , Dieter Draxelmayr Dielectric absorption of low-k materials: extraction, modelling and influence on SAR ADCs. [Citation Graph (0, 0)][DBLP ] Conf ] Dalibor Biolek , Viera Biolkova , Josef Dobes Modeling of switched DC-DC converters by mixed s-z description. [Citation Graph (0, 0)][DBLP ] Conf ] V. Stornelli , G. Ferri , G. Leuzzi , A. De Marcellis A tunable 0.5-1.3 GHz CMOS 2nd order bandpass filter with 50 Omega input-output impedance matching. [Citation Graph (0, 0)][DBLP ] Conf ] Chunjie Duan , K. Gulat , Sunil P. Khatri Memory-based crosstalk canceling CODECs for on-chip buses. [Citation Graph (0, 0)][DBLP ] Conf ] Henrik Eriksson , Per Larsson-Edefors , Mary Sheeran , Magnus Själander , D. Johansson , M. Scholin Multiplier reduction tree with logarithmic logic depth and regular connectivity. [Citation Graph (0, 0)][DBLP ] Conf ] Jun Wei Lee , Yong Ching Lim , Sim Heng Ong A flexible and efficient sharp filter bank architecture for variable bandwidth systems. [Citation Graph (0, 0)][DBLP ] Conf ] Aparna Gurijala , John R. Deller Jr. , Dale Joachim Robustness optimization of parametric speech watermarking. [Citation Graph (0, 0)][DBLP ] Conf ] Johannes Grad , James E. Stine Low power binary addition using carry increment adders. [Citation Graph (0, 0)][DBLP ] Conf ] Douglas L. Maskell , Jussipekka Leiwo , Jagdish Chandra Patra The design of multiplierless FIR filters with a minimum adder step and reduced hardware complexity. [Citation Graph (0, 0)][DBLP ] Conf ] B. Ugur Töreyin , A. Enis Çetin Wavelet based detection of moving tree branches and leaves in video. [Citation Graph (0, 0)][DBLP ] Conf ] Andrea Gerosa , Andrea Bevilacqua , Andrea Neviani , Andrea Xotta An optimal architecture for a multimode ADC, based on the cascade of a Sigma Delta modulator and a flash converter. [Citation Graph (0, 0)][DBLP ] Conf ] Tanay Karnik , Peter Hazucha , Gerhard Schrom , Fabrice Paillet , Donald Gardner High-frequency DC-DC conversion : fact or fiction. [Citation Graph (0, 0)][DBLP ] Conf ] Chia-Chun Tsai , Huang-Chi Chou , Trong-Yen Lee , Rong-Shue Hsiao A single chip image sensor embedded smooth spatial filter with A/D conversion. [Citation Graph (0, 0)][DBLP ] Conf ] Maurice G. Bellanger Coefficient bias in constant modulus adaptive filters. [Citation Graph (0, 0)][DBLP ] Conf ] Hongliang Li , King N. Ngan Face segmentation in head-and-shoulder video sequences based on facial saliency map. [Citation Graph (0, 0)][DBLP ] Conf ] Chia-Nan Yeh , Yen-Tai Lai Low power readout control circuit for high resolution CMOS image sensor. [Citation Graph (0, 0)][DBLP ] Conf ] Konstantin Moiseev , Shmuel Wimer , Avinoam Kolodny Timing optimization of interconnect by simultaneous net-ordering, wire sizing and spacing. [Citation Graph (0, 0)][DBLP ] Conf ] A. D. Grasso , Gaetano Palumbo , Salvatore Pennisi Active reversed nested Miller compensation for three-stage amplifiers. [Citation Graph (0, 0)][DBLP ] Conf ] Kazuo Sakiyama , Bart Preneel , Ingrid Verbauwhede A fast dual-field modular arithmetic logic unit and its hardware implementation. [Citation Graph (0, 0)][DBLP ] Conf ] Simin Yu , Jinhu Lu Design and implementation of multi-directional grid multi-torus chaotic attractors. [Citation Graph (0, 0)][DBLP ] Conf ] Robert M. Senger , Eric D. Marsman , G. A. Carichner , S. Kubba , Michael S. McCorquodale , Richard B. Brown Low-latency, HDL-synthesizable dynamic clock frequency controller with self-referenced hybrid clocking. [Citation Graph (0, 0)][DBLP ] Conf ] N. P. Papadopoulos , A. A. Hatzopoulos , D. K. Papakostas , C. A. Dimitriadis , S. Siskos Modeling the impact of light on the performance of polycrystalline thin-film transistors at the sub-threshold region. [Citation Graph (0, 0)][DBLP ] Conf ] Yibin Ye , Muhammad M. Khellah , Dinesh Somasekhar , Vivek De Evaluation of differential vs. single-ended sensing and asymmetric cells in 90 nm logic technology for on-chip caches. [Citation Graph (0, 0)][DBLP ] Conf ] Hiroo Sekiya , T. Negishi , Tadashi Suetsugu , Takashi Yahagi Operation of class DE amplifier outside optimum condition. [Citation Graph (0, 0)][DBLP ] Conf ] Davy De Schrijver , Wesley De Neve , Koen De Wolf , Stijn Notebaert , Rik Van de Walle XML-based customization along the scalability axes of H.264/AVC scalable video coding. [Citation Graph (0, 0)][DBLP ] Conf ] Milind S. Sawant , Jaime Ramírez-Angulo , Ramón González Carvajal , Antonio J. López-Martín Linear compact CMOS OTA with multidecade tuning, -62dB IM3, -75dB SFDR, constant input range and two independent degrees of freedom for gain adjustment. [Citation Graph (0, 0)][DBLP ] Conf ] Louis Dupont , Sébastien Roy , Jean-Yves Chouinard A FPGA implementation of an elliptic curve cryptosystem. [Citation Graph (0, 0)][DBLP ] Conf ] Hui Shao , Chi-Ying Tsui , Wing-Hung Ki A charge based computation system and control strategy for energy harvesting applications. [Citation Graph (0, 0)][DBLP ] Conf ] S. U. Ay Spectral response improvement of CMOS APS pixel through lateral collection. [Citation Graph (0, 0)][DBLP ] Conf ] Parity-based on-line detection for a bit-parallel systolic dual-basis multiplier over GF(2m ). [Citation Graph (0, 0)][DBLP ] Conf ] Weining Ni , Xueyang Geng , Yin Shi , Foster F. Dai A 12-bit 300 MHz CMOS DAC for high-speed system applications. [Citation Graph (0, 0)][DBLP ] Conf ] Kyung-Soo Ha , Lee-Sup Kim Charge-pump reducing current mismatch in DLLs and PLLs. [Citation Graph (0, 0)][DBLP ] Conf ] Bo Fu , Paul Ampadu Techniques for robust energy efficient subthreshold domino CMOS circuits. [Citation Graph (0, 0)][DBLP ] Conf ] Michele Bonnin , Fernando Corinto , Pier Paolo Civalleri , Marco Gilli Information and image processing through bio-inspired oscillatory cellular nonlinear networks. [Citation Graph (0, 0)][DBLP ] Conf ] Naixiang Lian , Vitali Zagorodnov , Yap-Peng Tan Video denoising using vector estimation of wavelet coefficients. [Citation Graph (0, 0)][DBLP ] Conf ] P. Martigne UWB for low data rate applications: technology overview and regulatory aspects. [Citation Graph (0, 0)][DBLP ] Conf ] Hou-Ming Chen , Chih-Liang Huang , Robert C. Chang A new temperature-compensated CMOS bandgap reference circuit for portable applications. [Citation Graph (0, 0)][DBLP ] Conf ] Gian-Carlo Cardarilli , Salvatore Pontarelli , Marco Re , Adelio Salsano Concurrent error detection in Reed Solomon decoders. [Citation Graph (0, 0)][DBLP ] Conf ] Wu-Sheng Lu Design of FIR filters with discrete coefficients via sphere relaxation. [Citation Graph (0, 0)][DBLP ] Conf ] K. Wada , Randall L. Geiger Minimization of total area in integrated active RC filters. [Citation Graph (0, 0)][DBLP ] Conf ] L. Marco , Eduard Alarcón , Dragan Maksimovic Effects of switching power converter nonidealities in envelope elimination and restoration technique. [Citation Graph (0, 0)][DBLP ] Conf ] Victor Adrian , Bah-Hwee Gwee , J. S. Chang An acoustic noise suppression system with reduced musical artifacts. [Citation Graph (0, 0)][DBLP ] Conf ] Yiyin Wang , R. van Leuken , A.-J. van der Veen Design of a practical scheme for ultra wideband communication. [Citation Graph (0, 0)][DBLP ] Conf ] P. M. Djuric , M. M. Begovic , J. Ferkel Prediction of power equipment failures based on chronological failure records. [Citation Graph (0, 0)][DBLP ] Conf ] Elias Kougianos , Saraju P. Mohanty Effective tunneling capacitance: a new metric to quantify transient gate leakage current. [Citation Graph (0, 0)][DBLP ] Conf ] Maysam Ghovanloo Switched-capacitor based implantable low-power wireless microstimulating systems. [Citation Graph (0, 0)][DBLP ] Conf ] Anand Pappu , Alyssa B. Apsel Synthesis of a current source using a formal design methodology. [Citation Graph (0, 0)][DBLP ] Conf ] Fei Sun , Siddharth Devarajan , Kenneth Rose , Tong Zhang Multilevel flash memory on-chip error correction based on trellis coded modulation. [Citation Graph (0, 0)][DBLP ] Conf ] Jiann-Chyi Rau , Jun-Yi Chang , Chien-Shiun Chen A broadcast-based test scheme for reducing test size and application time. [Citation Graph (0, 0)][DBLP ] Conf ] Heng-Yao Lin , Ying-Hong Lu , Bin-Da Liu , Jar-Ferr Yang Low power design of H.264 CAVLC decoder. [Citation Graph (0, 0)][DBLP ] Conf ] Stelios Krinidis , Vassilios Chatzis Frequency-based object orientation and scaling determination. [Citation Graph (0, 0)][DBLP ] Conf ] B. Agrawal , Jeffrey G. Hemmett , K. K. Moody , D. B. White Techniques to address increased dimensionality of ASIC library design. [Citation Graph (0, 0)][DBLP ] Conf ] Katherine L. Cameron , Alan F. Murray , S. Collins Spike timing dependent adaptation for mismatch compensation. [Citation Graph (0, 0)][DBLP ] Conf ] A. Evans , Miriam Fernández , David Vallet , Pablo Castells Adaptive multimedia access: from user needs to semantic personalisation. [Citation Graph (0, 0)][DBLP ] Conf ] Qing Wu , Jingyi Zhang , Qinru Qiu Design considerations for digital circuits using organic thin film transistors on a flexible substrate. [Citation Graph (0, 0)][DBLP ] Conf ] Lourans Samid , Yiannos Manoli A multibit continuous time sigma delta modulator with successive-approximation quantizer. [Citation Graph (0, 0)][DBLP ] Conf ] Shuji Tsukiyama , M. Tomita An algorithm for calculating correlation coefficients between Elmore interconnect delays. [Citation Graph (0, 0)][DBLP ] Conf ] Håkan Johansson , Per Löwenborg , K. Vengattaramane Reconstruction of two-periodic nonuniformly sampled signals using polynomial impulse response time-varying FIR filters. [Citation Graph (0, 0)][DBLP ] Conf ] Yuan-Sun Chu , Hui-Kai Su , Po-Feng Lin , Ming-Jen Chen High speed routing lookup IC design for IPv6. [Citation Graph (0, 0)][DBLP ] Conf ] Kin-Sang Chio , Seng-Pan U. , Rui Paulo Martins A dual-mode low-distortion sigma-delta modulator with relaxing comparator accuracy. [Citation Graph (0, 0)][DBLP ] Conf ] Wern Ming Koe , Franco Maloberti , J. Hochschild , S. Karthikeyan , Y.-K. Park Digital scheme for quantizer and integrator swing reduction in multibit sigma-delta modulator. [Citation Graph (0, 0)][DBLP ] Conf ] Reza Molavi , Shahriar Mirabbasi , R. Saleh A high-speed low-energy dynamic PLA using an input-isolation scheme. [Citation Graph (0, 0)][DBLP ] Conf ] Kati Virtanen , Mikko Pänkäälä , Mika Laiho , Ari Paasio Implementation of an asynchronous current-mode ADC with adaptive quantization. [Citation Graph (0, 0)][DBLP ] Conf ] Gian-Carlo Cardarilli , Andrea Del Re , Marco Re , L. Simone Optimized QPSK modulator for DVB-S applications. [Citation Graph (0, 0)][DBLP ] Conf ] Manfred Josef Aigner , Stefan Mangard , Francesco Menichelli , Renato Menicocci , Mauro Olivieri , Thomas Popp , Giuseppe Scotti , Alessandro Trifiletti Side channel analysis resistant design flow. [Citation Graph (0, 0)][DBLP ] Conf ] Nei-Chiung Perng , Jian-Jia Chen , Chuan-Yue Yang , Tei-Wei Kuo Energy-efficient scheduling on multi-context FPGAs. [Citation Graph (0, 0)][DBLP ] Conf ] Michael Kleinberg , Karen Miu , Chika O. Nwankpa Radial distribution power flow studies in a remotely distributed environment. [Citation Graph (0, 0)][DBLP ] Conf ] Y. Le Guillou The effects of quantizer metastability on the SNR of continuous-time Sigma Delta modulators with return-to-zero switched current DAC. [Citation Graph (0, 0)][DBLP ] Conf ] Sohrab Samadian , Michael M. Green Phase noise in dual inverter-based CMOS ring oscillators. [Citation Graph (0, 0)][DBLP ] Conf ] Rafael Escovar , Salvador Ortiz , Roberto Suaya Mutual inductance between intentional inductors: closed form expressions. [Citation Graph (0, 0)][DBLP ] Conf ] Tero Ihalainen , T. H. Stitz , Ari Viholainen , Markku Renfors Performance comparison of LDPC-coded FBMC and CP-OFDM in beyond 3G context. [Citation Graph (0, 0)][DBLP ] Conf ] Emmanouil Benetos , Margarita Kotti , Constantine Kotropoulos Musical instrument classification using non-negative matrix factorization algorithms. [Citation Graph (0, 0)][DBLP ] Conf ] Chun-Chia Chen , Yu-Wei Chang , Hung-Chi Fang , Liang-Gee Chen Analysis of scalable architecture for the embedded block coding in JPEG 2000. [Citation Graph (0, 0)][DBLP ] Conf ] A. Shrivastava 12-bit non-calibrating noise-immune redundant SAR ADC for system-on-a-chip. [Citation Graph (0, 0)][DBLP ] Conf ] Dongsheng Ma Automatic substrate switching circuit for on-chip adaptive power supply system. [Citation Graph (0, 0)][DBLP ] Conf ] Guerino Giancola , Daniele Domenicali , Maria-Gabriella Di Benedetto Application of fluid time hopping coding to multiple access in ultra wide band sensor networks. [Citation Graph (0, 0)][DBLP ] Conf ] M. Nakagawa A high-speed computational method of fuzzy inference system for embedded systems. [Citation Graph (0, 0)][DBLP ] Conf ] Nikolaos Kavvadias , Spiridon Nikolaidis A portable specification of zero-overhead looping control hardware applied to embedded processors. [Citation Graph (0, 0)][DBLP ] Conf ] Junli Liang , Shijun Wang , Shuyuan Yang Robust adaptive infinite impulse response notch filters: a novel state-space approach. [Citation Graph (0, 0)][DBLP ] Conf ] Muhammad Yasser , A. Trisanto , Jianming Lu , Hiroo Sekiya , Takashi Yahagi Adaptive sliding mode control using simple adaptive control for SISO nonlinear systems. [Citation Graph (0, 0)][DBLP ] Conf ] L. Carranza , R. Laviana , S. Vargas , Jorge Cuadri , Gustavo Liñán , E. Roca , Ángel Rodríguez-Vázquez Locust-inspired vision system on chip architecture for collision detection in automotive applications. [Citation Graph (0, 0)][DBLP ] Conf ] Zhengming Fu , Eugenio Culurciello An ultra-low power silicon-on-sapphire ADC for energy-scavenging sensors. [Citation Graph (0, 0)][DBLP ] Conf ] Hong-Yi Huang , Ching-Chieh Wu , Sen-Da Wu On-chip bidirectional transceiver. [Citation Graph (0, 0)][DBLP ] Conf ] Mei-Fen Chou , Wen-An Tsou , R. H. Dunn , Hsiang-Lin Huang , Kuei-Ann Wen , Chun-Yen Chang A CMOS distributed amplifier with current reuse optimization. [Citation Graph (0, 0)][DBLP ] Conf ] Chang-Kyung Seong , Seung-Woo Lee , Woo-Young Choi A 1.25-Gb/s digitally-controlled dual-loop clock and data recovery circuit with enhanced phase resolution. [Citation Graph (0, 0)][DBLP ] Conf ] Aiman El-Maleh An efficient test vector compression technique based on block merging. [Citation Graph (0, 0)][DBLP ] Conf ] Zih-Heng Chen , Ming-Haw Jing , Jian-Hong Chen , Yaotsu Chang New viewpoint of bit-serial/parallel normal basis multipliers using irreducible all-one polynomial. [Citation Graph (0, 0)][DBLP ] Conf ] Haihong Zhang , Cuntai Guan , Yuanqing Li Signal processing for brain-computer interface: enhance feature extraction and classification. [Citation Graph (0, 0)][DBLP ] Conf ] Manho Kim , Daewook Kim , Gerald E. Sobelman Network-on-chip quality-of-service through multiprotocol label switching. [Citation Graph (0, 0)][DBLP ] Conf ] Samuel Dubouloz , Alberto Rabbachin , Sébastien de Rivaz , Benoit Denis , Laurent Ouvry Performance analysis of low complexity solutions for UWB low data rate impulse radio. [Citation Graph (0, 0)][DBLP ] Conf ] Ruben Merz , A. El Fawal , Jean-Yves Le Boudec , Bozidar Radunovic , Jörg Widmer The optimal MAC layer for low-power UWB is non-coordinated. [Citation Graph (0, 0)][DBLP ] Conf ] Kuo-Hsing Cheng , Kai-Fei Chang , Yu-lung Lo , Ching-Wen Lai , Yuh-Kuang Tseng A 100MHz-1GHz adaptive bandwidth phase-locked loop in 90nm process. [Citation Graph (0, 0)][DBLP ] Conf ] Henning Gundersen , Yngvar Berg A novel ternary more, less and equality circuit using recharged semi-floating gate devices. [Citation Graph (0, 0)][DBLP ] Conf ] Jie Yuan , Nabil Farhat , Jan Van der Spiegel A CMOS monolithic implementation of a nonlinear element for arbitrary 1D map generation. [Citation Graph (0, 0)][DBLP ] Conf ] Kaiping Zeng , Sorin A. Huss Architecture refinements by code refactoring of behavioral VHDL-AMS models. [Citation Graph (0, 0)][DBLP ] Conf ] M. Hellfeld , Joerg Krupar , Wolfgang M. Schwarz An improved PDS calculation procedure for hybrid systems. [Citation Graph (0, 0)][DBLP ] Conf ] Mark D. Skowronski , John G. Harris Minimum mean squared error time series classification using an echo state network prediction model. [Citation Graph (0, 0)][DBLP ] Conf ] Kyusik Chung , Chang-Hyo Yu , Lee-Sup Kim Vertex cache of programmable geometry processor for mobile multimedia application. [Citation Graph (0, 0)][DBLP ] Conf ] Yu-Jen Chen , Chen-Han Tsai , Liang-Gee Chen Architecture design of area-efficient SRAM-based multi-symbol arithmetic encoder in H.264/AVC. [Citation Graph (0, 0)][DBLP ] Conf ] Ali Naderi , Mohamad Sawan , Yvon Savaria A novel 2-GHz band-pass delta modulator dedicated to wireless receivers. [Citation Graph (0, 0)][DBLP ] Conf ] G. Efthivoulidis Linear switched-capacitor circuit theorems. [Citation Graph (0, 0)][DBLP ] Conf ] Rumi Zhang , Graham A. Jullien , Wei Wang , Anestis Dounavis Passive reduced-order macromodeling algorithm for structure dynamics in MEMS systems. [Citation Graph (0, 0)][DBLP ] Conf ] Majid Baghaei Nejad , Li-Rong Zheng An innovative receiver architecture for autonomous detection of ultra-wideband signals. [Citation Graph (0, 0)][DBLP ] Conf ] Eddie B. L. Filho , Eduardo A. B. da Silva , Waldir S. S. Junior , Murilo B. de Carval ECG compression using multiscale recurrent patterns with period normalization. [Citation Graph (0, 0)][DBLP ] Conf ] Pyung-Su Han , Woo-Young Choi 1.25/2.5-Gb/s burst-mode clock recovery circuit with a novel dual bit-rate structure in 0.18µm CMOS. [Citation Graph (0, 0)][DBLP ] Conf ] Kok-Leong Chang , Bah-Hwee Gwee A low-energy low-voltage asynchronous 8051 microcontroller core. [Citation Graph (0, 0)][DBLP ] Conf ] Davide Badoni , M. Giulioni , Vittorio Dante , Paolo Del Giudice An aVLSI recurrent network of spiking neurons with reconfigurable and plastic synapses. [Citation Graph (0, 0)][DBLP ] Conf ] Liang Zhou , M. Nakamura Weighted Viterbi decoding for MIMO-OFDM systems with linear precoding. [Citation Graph (0, 0)][DBLP ] Conf ] M. Sengul , J. Trabert , K. Blau , B. Siddik Yarman , M. Hein Power transfer networks at RF frequencies: new design procedures with implementation roadmap. [Citation Graph (0, 0)][DBLP ] Conf ] Grigoris Dimitroulakos , Michalis D. Galanis , Constantinos E. Goutis Resource constrained modulo scheduling for coarse-grained reconfigurable arrays. [Citation Graph (0, 0)][DBLP ] Conf ] Hadi Esmaeilzadeh , A. Moghimi , E. Ebrahimi , Caro Lucas , Zainalabedin Navabi , A. M. Fakhraie DCim++: a C++ library for object oriented hardware design and distributed simulation. [Citation Graph (0, 0)][DBLP ] Conf ] Sabbir U. Ahmad , Andreas Antoniou A genetic algorithm approach for fractional delay FIR filters. [Citation Graph (0, 0)][DBLP ] Conf ] Belén Calvo , Santiago Celma , Pedro A. Martínez , Maria Teresa Sanz 1.8 V-100 MHz CMOS programmable gain amplifier. [Citation Graph (0, 0)][DBLP ] Conf ] Takayuki Kimura , Tohru Ikeguchi Optimization for packet routing using chaotic dynamics. [Citation Graph (0, 0)][DBLP ] Conf ] Jin-Tai Yan , Kuen-Ming Lin , Yen-Hsiang Chen Optimal shielding insertion for inductive noise avoidance. [Citation Graph (0, 0)][DBLP ] Conf ] Claudio Passerone Real time operating system modeling in a system level design environment. [Citation Graph (0, 0)][DBLP ] Conf ] Wei Wang , I-Chyn Wey , Chia-Tsun Wu , An-Yeu Wu A portable all-digital pulsewidth control loop for SOC applications. [Citation Graph (0, 0)][DBLP ] Conf ] Elie Inaty , Rafic A. Ayoubi FPGA-based transmitter-receiver architecture of an overlapped FFH-CDMA system: design and simulation. [Citation Graph (0, 0)][DBLP ] Conf ] Sean Safarpour , Andreas G. Veneris , Rolf Drechsler Integrating observability don't cares in all-solution SAT solvers. [Citation Graph (0, 0)][DBLP ] Conf ] Jonathan Rosenfeld , Eby G. Friedman Design methodology for global resonant H-tree clock distribution networks. [Citation Graph (0, 0)][DBLP ] Conf ] Elisabetta Chicca , Patrick Lichtsteiner , Tobi Delbrück , Giacomo Indiveri , Rodney J. Douglas Modeling orientation selectivity using a neuromorphic multi-chip system. [Citation Graph (0, 0)][DBLP ] Conf ] Edward Choi , Zhiyong Gu , D. Gracias , Andreas G. Andreou Chip-scale magnetic sensing and control of nanoparticles and nanorods. [Citation Graph (0, 0)][DBLP ] Conf ] Tsung-Sum Lee , Hua-Yuan Chung , Sheng-Min Cai Design techniques for low-voltage fully differential CMOS switched-capacitor amplifiers. [Citation Graph (0, 0)][DBLP ] Conf ] F. Tomohiro , I. Osamu Analog circuit sizing with dynamic search window. [Citation Graph (0, 0)][DBLP ] Conf ] Mikko Loikkanen , Juha Kostamovaara PSRR improvement technique for amplifiers with Miller capacitor. [Citation Graph (0, 0)][DBLP ] Conf ] D. Porto A new method for matrix description of genetic algorithms. [Citation Graph (0, 0)][DBLP ] Conf ] Yijin Wang , Ming Hsing , Chen Xu , Jiong Li , Mansun Chan A single chip micro-DNA-array system based on CMOS image sensor technology. [Citation Graph (0, 0)][DBLP ] Conf ] A. S. Deese , Chika O. Nwankpa Emulation of power system load dynamic behavior through reconfigurable analog circuits. [Citation Graph (0, 0)][DBLP ] Conf ] E. B. Castelan , U. F. Moreno , E. R. de Pieri Absolute stabilization of discrete-time systems with a sector bounded nonlinearity under control saturations. [Citation Graph (0, 0)][DBLP ] Conf ] N. Talebbeydokhti , Pavan Kumar Hanumolu , P. Kurahashi , Un-Ku Moon Constant transconductance bias circuit with an on-chip resistor. [Citation Graph (0, 0)][DBLP ] Conf ] D. Murphy , M. P. Kennedy , J. Buckley , Min Qu The optimum power conversion efficiency and associated gain of an LC CMOS oscillator. [Citation Graph (0, 0)][DBLP ] Conf ] Yu Shao , Chip-Hong Chang A novel hybrid neuro-wavelet system for robust speech recognition. [Citation Graph (0, 0)][DBLP ] Conf ] Pei-Yu Huang , Yu-Min Lee , Jeng-Liang Tsai , Charlie Chung-Ping Chen Simultaneous area minimization and decaps insertion for power delivery network using adjoint sensitivity analysis with IEKS method. [Citation Graph (0, 0)][DBLP ] Conf ] Shu-Kei Yip , Oscar C. Au , Hoi-Ming Wong , Chi-Wang Ho Generalized lossless data hiding by multiple predictors. [Citation Graph (0, 0)][DBLP ] Conf ] Shigeyuki Sakazawa , Yasuhiro Takishima , Yasuyuki Nakajima H.264 native video watermarking method. [Citation Graph (0, 0)][DBLP ] Conf ] Karim Abdelhalim , Leonard MacEachern , Samy A. Mahmoud A nanowatt ADC for ultra low power applications. [Citation Graph (0, 0)][DBLP ] Conf ] Lu Ping , Ye Fan , Ren Junyan A low-jitter frequency synthesizer with dynamic phase interpolation for high-speed Ethernet. [Citation Graph (0, 0)][DBLP ] Conf ] A. Persson , L. Bengtsson Reverse conversion architectures for signed-digit residue number systems. [Citation Graph (0, 0)][DBLP ] Conf ] David G. Haigh , T. J. W. Clarke , Paul M. Radmore A mathematical framework for active circuits based on port equivalence using limit variables. [Citation Graph (0, 0)][DBLP ] Conf ] Shihong Deng , Yamu Hu , Mohamad Sawan A high data rate QPSK demodulator for inductively powered electronics implants. [Citation Graph (0, 0)][DBLP ] Conf ] N. Beilleau , A. Kammoun , Hassan Aboushady Systematic design method for LC bandpass Sigma Delta modulators with feedback FIRDACs. [Citation Graph (0, 0)][DBLP ] Conf ] Po-An Chen , Tzi-Dar Chiueh Design of a low power mixed-signal RAKE receiver. [Citation Graph (0, 0)][DBLP ] Conf ] Mykhaylo A. Teplechuk , John I. Sewell The approximation of arbitrary complex filter responses. [Citation Graph (0, 0)][DBLP ] Conf ] Ayhan A. Mutlu , Charles Kwong , Abir Mukherjee , Mahmud Rahman Statistical circuit performance variability minimization under manufacturing variations. [Citation Graph (0, 0)][DBLP ] Conf ] Yi Liang , Haohong Wang , Khaled El-Maleh Design and implementation of content-adaptive background skipping for wireless video. [Citation Graph (0, 0)][DBLP ] Conf ] Makoto Sugihara , Taiga Takata , Kenta Nakamura , Ryoichi. Inanami , Hiroaki Hayashi , Katsumi Kishimoto , Tetsuya Hasebe , Yukihiro Kawano , Yusuke Matsunaga , Kazuaki Murakami , Katsuya Okumura A character size optimization technique for throughput enhancement of character projection lithography. [Citation Graph (0, 0)][DBLP ] Conf ] Chih-Ming Fu , Wen-Liang Hwang , Chung-Lin Huang Error concealment protection for loss resilient bitplane-coded video communications. [Citation Graph (0, 0)][DBLP ] Conf ] C. Psychalinos Improved building blocks for log-domain linear transformation filters. [Citation Graph (0, 0)][DBLP ] Conf ] Tobi Delbrück , Patrick Lichtsteiner Fully programmable bias current generator with 24 bit resolution per bias. [Citation Graph (0, 0)][DBLP ] Conf ] Vivek Nigam , Masud H. Chowdhury , Roland Priemer Compound noise analysis in digital circuits using blind source separation. [Citation Graph (0, 0)][DBLP ] Conf ] Lan-Da Van , Hsin-Fu Luo , Nien-Hsiang Chang , Chun-Ming Huang A cost-effective reconfigurable accelerator for platform-based SOC design. [Citation Graph (0, 0)][DBLP ] Conf ] Federico Bizzarri , L. Caruso , Marco Storace Bifurcation analysis of a second-order impact model for forest fire prediction through a 1D-map. [Citation Graph (0, 0)][DBLP ] Conf ] H. Spaanenburg , J. Thompson , V. Abraham , Lambert Spaanenburg , Wenhai Fang Need for large local FPGA-accessible memories in the integration of bio-inspired applications into embedded systems. [Citation Graph (0, 0)][DBLP ] Conf ] Lei Wang , N. Patel Reducing error accumulation effect in multithreaded memory systems. [Citation Graph (0, 0)][DBLP ] Conf ] F. Dulger , Sher Jiun Fang , A. N. Mohieldin , P. Fontaine , A. Bellaouar , M. Frechette A quad-band receiver for GSM/GPRS/EDGE in 90 nm digital CMOS. [Citation Graph (0, 0)][DBLP ] Conf ] Alonso Morgado , Rocio del Río , José Manuel de la Rosa , F. Medeiro , Maria Belen Pérez-Verdú , Francisco V. Fernández , Ángel Rodríguez-Vázquez Reconfiguration of cascade Sigma Delta modulators for multistandard GSM/Bluetooth/UMTS/WLAN transceivers. [Citation Graph (0, 0)][DBLP ] Conf ] Le Jin , Hanqing Xing , Degang Chen , R. Geiger A self-calibrated bandgap voltage reference with 0.5 ppm/°C temperature coefficient. [Citation Graph (0, 0)][DBLP ] Conf ] Zhe Wei , Canhui Cai Realization and optimization of DSP based H.264 encoder. [Citation Graph (0, 0)][DBLP ] Conf ] Zhiping Lin , Yongzhi Liu FIR filter design with group delay constraint using semidefinite programming. [Citation Graph (0, 0)][DBLP ] Conf ] R. Paz-Vicente , Alejandro Linares-Barranco , D. Cascado , M. A. Rodriguez , Gabriel Jiménez , Antón Civit , José Luis Sevillano PCI-AER interface for neuro-inspired spiking systems. [Citation Graph (0, 0)][DBLP ] Conf ] Jie Don , Yu Hu , Yinhe Han , Xiaowei Li An on-chip combinational decompressor for reducing test data volume. [Citation Graph (0, 0)][DBLP ] Conf ] Alejandro Linares-Barranco , D. Cascado , Gabriel Jiménez , Antón Civit , Matthias Oster , Bernabé Linares-Barranco Poisson AER generator: inter-spike-intervals analysis. [Citation Graph (0, 0)][DBLP ] Conf ] V. Jimenez-Fernandez , L. Hernandez-Martinez , Arturo Sarmiento-Reyes A method for finding the DC solution regions in piecewise-linear networks. [Citation Graph (0, 0)][DBLP ] Conf ] Cameron T. Charles , David J. Allstot A 2-GHz CMOS variable gain amplifier optimized for low noise. [Citation Graph (0, 0)][DBLP ] Conf ] Pei-Yung Hsiao , Chia-Hsiung Chen , Shin-Shian Chou , Le-Tien Li , Sao-Jie Chen A parameterizable digital-approximated 2D Gaussian smoothing filter for edge detection in noisy image. [Citation Graph (0, 0)][DBLP ] Conf ] Minglei Liu , Ce Zhu , Xiaolin Wu Index assignment design for three-description lattice vector quantization. [Citation Graph (0, 0)][DBLP ] Conf ] H. Mori , Y. Maeda Application of two-layered tabu search to optimal allocation of UPFC for maximizing transmission capability. [Citation Graph (0, 0)][DBLP ] Conf ] He Li , Z. G. Li , Changyun Wen , Lap-Pui Chau Fast mode decision for spatial scalable video coding. [Citation Graph (0, 0)][DBLP ] Conf ] Vasily G. Moshnyaga , Kenji Wakisaka Reducing computations in MPEG2 video decoder. [Citation Graph (0, 0)][DBLP ] Conf ] Michail Papamichail , Dimitris Karadimas , Kostas Efstathiou , George Papadopoulos Linear range extension of a phase-frequency-detector with saturated output. [Citation Graph (0, 0)][DBLP ] Conf ] Ryosuke Hosaka , Tohru Ikeguchi , Yutaka Sakai , Shuji Yoshizawa A new classification of neuron models for random inputs on bifurcation structures. [Citation Graph (0, 0)][DBLP ] Conf ] Andrew B. T. Hopkins , Klaus D. McDonald-Maier Debug support for embedded processor reuse. [Citation Graph (0, 0)][DBLP ] Conf ] Ruiqin Xiong , Jizheng Xu , Feng Wu , Shipeng Li In-scale motion aligned temporal filtering. [Citation Graph (0, 0)][DBLP ] Conf ] S. C. Chan , S. H. Zhao Transmit/receive beamformer design and power control in MIMO MC-CDMA systems. [Citation Graph (0, 0)][DBLP ] Conf ] Yongming Yang , Chao Xu Fast wavelet packet basis selection for block-partitioning image coding. [Citation Graph (0, 0)][DBLP ] Conf ] Siu-Ping Chan , Ming-Ting Sun Network condition detection for video transport over wireless Internet. [Citation Graph (0, 0)][DBLP ] Conf ] Heng-Ming Hsu , Ching-Liang Dai , Ming-Ming Hsieh , Ming-Chang Tsai , Hsuan-Jung Peng Implementation and analysis of microwave switch in CMOS-MEMS technology. [Citation Graph (0, 0)][DBLP ] Conf ] Hanli Wang , Sam Kwong , Chi-Wah Kok Fast video coding based on Gaussian model of DCT coefficients. [Citation Graph (0, 0)][DBLP ] Conf ] Thomas Popp , Stefan Mangard Implementation aspects of the DPA-resistant logic style MDPL. [Citation Graph (0, 0)][DBLP ] Conf ] Bogdan J. Falkowski , Cicilia C. Lozano , Susanto Rahardja Efficient computation of fixed polarity arithmetic expansions for ternary functions. [Citation Graph (0, 0)][DBLP ] Conf ] Guoqing Chen , Eby G. Friedman Effective capacitance of RLC loads for estimating short-circuit power. [Citation Graph (0, 0)][DBLP ] Conf ] Naoya Wada , Noboru Hayasaka , Shingo Yoshizawa , Yoshikazu Miyanaga Direct control on modulation spectrum for noise-robust speech recognition and spectral subtraction. [Citation Graph (0, 0)][DBLP ] Conf ] K. M. Tsui , S. C. Chan On the design of two-channel 2D nonseparable multiplet perfect reconstruction filter banks. [Citation Graph (0, 0)][DBLP ] Conf ] Wei-Ping Zhu , Chao Wu , M. N. S. Swamy Realization of 2D FIR filters using generalized polyphase structure combined with singular-value decomposition. [Citation Graph (0, 0)][DBLP ] Conf ] K. Nakada Robustness in binary cellular non-linear networks analog VLSI resonate-and-fire neuron. [Citation Graph (0, 0)][DBLP ] Conf ] S. M. Kashmiri , Sandro A. P. Haddad , Wouter A. Serdijn High-performance analog delays: surpassing Bessel-Thomson by Pade-approximated Gaussians. [Citation Graph (0, 0)][DBLP ] Conf ] Gian-Carlo Cardarilli , Salvatore Pontarelli , Marco Re , Adelio Salsano Fault tolerant design of signed digit based FIR filters. [Citation Graph (0, 0)][DBLP ] Conf ] Hanqing Xing , Degang Chen , R. Geiger Linearity test for high resolution DACs using low-accuracy DDEM flash ADCs. [Citation Graph (0, 0)][DBLP ] Conf ] Y. TenAmi , Dariusz Czarkowski , Zivan Zabar , H. Leeman Unit substation demand estimator. [Citation Graph (0, 0)][DBLP ] Conf ] Mukesh Ranjan , Ranga Vemuri Exact hierarchical symbolic analysis of large analog networks using a general interconnection template. [Citation Graph (0, 0)][DBLP ] Conf ] Haiyong Wang , Guoliang Shou , Nanjian Wu An adaptive frequency synthesizer architecture reducing reference sidebands. [Citation Graph (0, 0)][DBLP ] Conf ] Avnish R. Brahmbhatt , Jingyi Zhang , Qinru Qiu , Qing Wu Adaptive low-power bus encoding based on weighted code mapping. [Citation Graph (0, 0)][DBLP ] Conf ] Mingjian Liu , A. Marciello , M. di Bernardo , Ljiljana Trajkovic Discontinuity-induced bifurcations in TCP/RED communication algorithms. [Citation Graph (0, 0)][DBLP ] Conf ] Shanying Wu , S. F. Simon Hau , Y. M. Wong The effect of D/A accuracy on the performance of digital predistortion for RF power amplifiers. [Citation Graph (0, 0)][DBLP ] Conf ] Manuel de la Sen , Aitor J. Garrido , J. C. Soto , O. Barambones , F. J. Maseda , I. Garrido Time-sliding suboptimal regulation of bilinear interconnected systems. [Citation Graph (0, 0)][DBLP ] Conf ] K. H. Abed , K. Y. Wong , Marian K. Kazimierczuk CMOS zero cross-conduction low-power driver and power MOSFETs for integrated synchronous buck converter. [Citation Graph (0, 0)][DBLP ] Conf ] U. F. Moreno , E. B. Castelan , E. R. de Pieri Symbolic analysis of bifurcations in planar variable structure systems. [Citation Graph (0, 0)][DBLP ] Conf ] Amr Elshazly , Khaled M. Sharaf 2 GHz 1V sub-mW, fully integrated PLL for clock recovery applications using self-skewing. [Citation Graph (0, 0)][DBLP ] Conf ] S. Hashemi , Mohamad Sawan , Yvon Savaria A power planning model for implantable stimulators. [Citation Graph (0, 0)][DBLP ] Conf ] Tim Barrett , Sumit D. Mediratta , Taek-Jun Kwon , Ravinder Singh , Sachit Chandra , Jeff Sondeen , Jeffrey T. Draper A double-data rate (DDR) processing-in-memory (PIM) device with wideword floating-point capability. [Citation Graph (0, 0)][DBLP ] Conf ] Chun-Lung Hsu , Yu-Kuan Wu , Yi-Ting Lai , Mean-Horn Ho Design of current-mode resonator for wireless applications. [Citation Graph (0, 0)][DBLP ] Conf ] Ming-Ta Hsieh , Gerald E. Sobelman Modeling and verification of high-speed wired links with Verilog-AMS. [Citation Graph (0, 0)][DBLP ] Conf ] Quentin Diduck , John Liobe , Sadeka Ali , Martin Margala Process tolerant calibration circuit for PLL applications with BIST. [Citation Graph (0, 0)][DBLP ] Conf ] Zhi Li , Qibin Sun , Yong Lian Unequal authenticity protection (UAP) for rate-distortion-optimized secure streaming of multimedia over wireless networks. [Citation Graph (0, 0)][DBLP ] Conf ] Chin-Teng Lin , Shi-An Chen , Ying-Chang Cheng , Jen-Feng Chung CNN-based local motion estimation chip for image stabilization processing. [Citation Graph (0, 0)][DBLP ] Conf ] Ying Wei , Alex Doboli Library of structural analog cell macromodels for design of continuous-time reconfigurable Delta Sigma modulators. [Citation Graph (0, 0)][DBLP ] Conf ] M. Saneei , Ali Afzali-Kusha , Zainalabedin Navabi Low-power and low-latency cluster topology for local traffic NoCs. [Citation Graph (0, 0)][DBLP ] Conf ] Evangelos F. Stefatos , I. Bravos , Tughrul Arslan Low-power implementation of FIR filters within an adaptive reconfigurable architecture. [Citation Graph (0, 0)][DBLP ] Conf ] T. Desilets , Mohamad Sawan , F. Bellemare Wireless esophageal catheter dedicated to respiratory diseases diagnostic. [Citation Graph (0, 0)][DBLP ] Conf ] Kai-Yuan Jheng , Yi-Chiuan Wang , An-Yeu Wu , Hen-Wai Tsao DSP engine design for LINC wireless transmitter systems. [Citation Graph (0, 0)][DBLP ] Conf ] Y. J. Liang , K. El-Maleh , S. Manjunath Upfront intra-refresh decision for low-complexity wireless video telephony. [Citation Graph (0, 0)][DBLP ] Conf ] M. M. Zhang , Paul J. Hurst Effect of nonlinearity in the CMFB circuit that uses the differential-difference amplifier. [Citation Graph (0, 0)][DBLP ] Conf ] Guido De Sandre , Mauro Forti , Paolo Nistri , Amedeo Premoli Full-range cellular neural networks and differential variational inequalities. [Citation Graph (0, 0)][DBLP ] Conf ] M. Khademul Islam Molla , Keikichi Hirose , Nobuaki Minematsu Localization based audio source separation by sub-band beamforming. [Citation Graph (0, 0)][DBLP ] Conf ] Yuan-Hwui Chung , See-May Phoong Linearly precoded ST-OFDM systems in the presence of ISI. [Citation Graph (0, 0)][DBLP ] Conf ] Roisin Duignan , Paul F. Curran An investigation on the stability of n-D Lur'e systems. [Citation Graph (0, 0)][DBLP ] Conf ] Chung-Hyo Kim , In-Cheol Park High speed decoding of context-based adaptive binary arithmetic codes using most probable symbol prediction. [Citation Graph (0, 0)][DBLP ] Conf ] R. Kolm , H. Zimmermann A linear transconductor and its application in an analog filter in 120nm CMOS. [Citation Graph (0, 0)][DBLP ] Conf ] A. Natarajan , Venkatraman Atti , Andreas Spanias , Kostas Tsakalis , L. D. Iasemidis A transform-domain G-PrOBE algorithm. [Citation Graph (0, 0)][DBLP ] Conf ] Eric C. Moule , Zeljko Ignjatovic Band-stop noise modulated bandpass sigma-delta analog-to-digital converter. [Citation Graph (0, 0)][DBLP ] Conf ] Milan Pastrnak , Peter H. N. de With , Jef L. van Meerbergen Realization of QoS management using negotiation algorithms for multiprocessor NoC. [Citation Graph (0, 0)][DBLP ] Conf ] Berndt M. Gammel , Rainer Göttfert , O. Kniffler An NLFSR-based stream cipher. [Citation Graph (0, 0)][DBLP ] Conf ] Stephen Warrington , Hassan Shojania , Subramania Sudharsanan , Wai-Yip Chan Performance improvement of the H.264/AVC deblocking filter using SIMD instructions. [Citation Graph (0, 0)][DBLP ] Conf ] Jen-Shiun Chiang , Yi-Tsung Li , Hsin-liang Chen A 20-MS/s sigma delta modulator for 802.11a applications. [Citation Graph (0, 0)][DBLP ] Conf ] Hye-Mi Choi , Ji-Hoon Kim , In-Cheol Park Low-power hybrid turbo decoding based on reverse calculation. [Citation Graph (0, 0)][DBLP ] Conf ] T. Kumano , Tetsushi Ueta , Hiroshi Kawakami Pattern emergence in strange attractors by directions of mappings. [Citation Graph (0, 0)][DBLP ] Conf ] Ding-Yu Fang , Long-Wen Chang Data hiding for digital video with phase of motion vector. [Citation Graph (0, 0)][DBLP ] Conf ] Oktay Altun , Mark F. Bocko Robust analog circuit design: a set theoretic approach. [Citation Graph (0, 0)][DBLP ] Conf ] Weixiang Shen , Yici Cai , Jiang Hu , Xianlong Hong , Bing Lu High performance clock routing in X-architecture. [Citation Graph (0, 0)][DBLP ] Conf ] Xiaokang Guan , A. Wang , A. Ishikawa , T. Tamura , Zhihua Wang , Chun Zhang A 3V 110µW 3.1 ppm/°C curvature-compensated CMOS bandgap reference. [Citation Graph (0, 0)][DBLP ] Conf ] Yongxiang Xia , Ck. Tse , Francis Chi-Moon Lau , Wai Man Tam , Xiuming Shan Traffic congestion analysis in complex networks. [Citation Graph (0, 0)][DBLP ] Conf ] Yu Shao , Chip-Hong Chang A generalized perceptual time-frequency subtraction method for speech enhancement. [Citation Graph (0, 0)][DBLP ] Conf ] Dayong Tao , Jianfei Cai VBR video delivery under constrained resources using motion-aware optimal frame selection. [Citation Graph (0, 0)][DBLP ] Conf ] S. Mitra , Stefano Fusi , Giacomo Indiveri A VLSI spike-driven dynamic synapse which learns only when necessary. [Citation Graph (0, 0)][DBLP ] Conf ] Ethiopia Nigussie , Juha Plosila , Jouni Isoaho Full-duplex link implementation using dual-rail encoding and multiple-valued current-mode logic. [Citation Graph (0, 0)][DBLP ] Conf ] Chao Wu , Wei-Ping Zhu , M. N. S. Swamy Design of Mth-band FIR filters based on generalized polyphase structure. [Citation Graph (0, 0)][DBLP ] Conf ] Wojciech Paszke , James Lam , Krzysztof Galkowski , Shengyuan Xu , Eric Rogers , Anton Kummert Delay-dependent stability of 2D state-delayed linear systems. [Citation Graph (0, 0)][DBLP ] Conf ] Radu P. Matei Design of a class of maximally-flat spatial filters. [Citation Graph (0, 0)][DBLP ] Conf ] Flavio Carbognani , Felix Bürgin , Norbert Felber , Hubert Kaeslin , Wolfgang Fichtner 42% power savings through glitch-reducing clocking strategy in a hearing aid application. [Citation Graph (0, 0)][DBLP ] Conf ] M. A. A. Mohamed , Hossam M. H. Shalaby , E.-S. A. El-Badawy On optical CDMA MAC protocols. [Citation Graph (0, 0)][DBLP ] Conf ] Francesco Tenore , R. Jacob Vogelstein , Ralph Etienne-Cummings , Gert Cauwenberghs , P. Hasler A floating-gate programmable array of silicon neurons for central pattern generating networks. [Citation Graph (0, 0)][DBLP ] Conf ] Jiuchao Feng , Shengli Xie An unscented-transform-based filtering algorithm for noisy contaminated chaotic signals. [Citation Graph (0, 0)][DBLP ] Conf ] Friedel Gerfers , Maurits Ortmanns , P. Schmitz A transistor-based clock jitter insensitive DAC architecture. [Citation Graph (0, 0)][DBLP ] Conf ] Luis Hernández , Susanna Patón , Andreas Wiesbauer Spectral shaping of clock jitter errors for continuous time sigma-delta modulators. [Citation Graph (0, 0)][DBLP ] Conf ] Mykhaylo A. Teplechuk , John I. Sewell Realisation of asymmetrical complex filters in log-domain. [Citation Graph (0, 0)][DBLP ] Conf ] Miriam Adlerstein Marwick , Andreas G. Andreou Retinomorphic system design in three dimensional SOI-CMOS. [Citation Graph (0, 0)][DBLP ] Conf ] Feng Su , Wing-Hung Ki , Chi-Ying Tsui High efficiency cross-coupled doubler with no reversion loss. [Citation Graph (0, 0)][DBLP ] Conf ] Raija Lehto , Tapio Saramäki , Olli Vainio Formulas to generate efficient piecewise-polynomial implementations of narrowband linear-phase FIR filters. [Citation Graph (0, 0)][DBLP ] Conf ] Sining Liu , F. Bowen , Brian King , Wei Wang Elliptic curves cryptosystem implementation based on a look-up table sharing scheme. [Citation Graph (0, 0)][DBLP ] Conf ] G. Theodoratos , A. Vasilopoulos , G. Vitzilaios , Yannis Papananos Calculating distortion in active CMOS mixers using Volterra series. [Citation Graph (0, 0)][DBLP ] Conf ] Chen Shoushun , Amine Bermak A second generation time-to-first-spike pixel with asynchronous self power-off. [Citation Graph (0, 0)][DBLP ] Conf ] C. Branas , F. J. Azcondo , R. Casanueva A generalized study of multiphase parallel resonant inverters for high-power applications. [Citation Graph (0, 0)][DBLP ] Conf ] H. Aomori , T. Otake , N. Takahashi , M. Tanaka Lifting-based lossless parallel image coding on discrete-time cellular neural networks. [Citation Graph (0, 0)][DBLP ] Conf ] Hong Yu , Y. Inoue , Y. Matsuya , Zhangcai Huang An effective pseudo-transient algorithm for finding DC operating points of nonlinear circuits. [Citation Graph (0, 0)][DBLP ] Conf ] Bu Aiguo , Shi Longxing , Hu Chen , Li Jie , Wang Chao Energy-optimal dynamic voltage scaling for sporadic tasks. [Citation Graph (0, 0)][DBLP ] Conf ] Hao Liu , Wenjun Zhang , Xiaokang Yang Retransmission-based error spreading for layered video streaming over wireless LANs. [Citation Graph (0, 0)][DBLP ] Conf ] A. J. Aragao , João Navarro Jr. , Wilhelmus A. M. Van Noije Mismatch effect analyses in CMOS tapered buffers. [Citation Graph (0, 0)][DBLP ] Conf ] R. Krenzke , Cang Ji , O. Salzmann High-voltage drive and I/O interfaces in a 0.35µm CMOS process. [Citation Graph (0, 0)][DBLP ] Conf ] Barry O'Donnell , Paul F. Curran , Orla Feely Bifurcation theory of a class of perturbed mappings. [Citation Graph (0, 0)][DBLP ] Conf ] Yuan-Pei Lin , Yu-Pin Lin , See-May Phoong A frequency domain based TEQ design for DSL systems. [Citation Graph (0, 0)][DBLP ] Conf ] Jaime Ramírez-Angulo , Antonio J. López-Martín , Ramón González Carvajal , J. A. Galan A free but efficient class AB two-stage operational amplifier. [Citation Graph (0, 0)][DBLP ] Conf ] Sherif A. Tawfik , Hossam A. H. Fahmy Algorithmic truncation of minimax polynomial coefficients. [Citation Graph (0, 0)][DBLP ] Conf ] Arindam Calomarde , Diego Mateo , Antonio Rubio High level spectral-based analysis of power consumption in DSPs systems. [Citation Graph (0, 0)][DBLP ] Conf ] Wen-Hsiao Peng , Tihao Chiang , Hsueh-Ming Hang Adding selective enhancement in scalable video coding for region-of-interest functionality. [Citation Graph (0, 0)][DBLP ] Conf ] Emrah Acar , Peter Feldmann Simulation of SOI transistor circuits through non-equilibrium initial condition analysis (NEICA). [Citation Graph (0, 0)][DBLP ] Conf ] Rafael Serrano-Gotarredona , Teresa Serrano-Gotarredona , A. Acosta-Jimenez , Bernabé Linares-Barranco An arbitrary kernel convolution AER-transceiver chip for real-time image filtering. [Citation Graph (0, 0)][DBLP ] Conf ] Giulio Antonini , Giuseppe Ferri A ladder network delay model for coupled interconnects. [Citation Graph (0, 0)][DBLP ] Conf ] Kimo Kim , In-Cheol Park Combined image signal processing for CMOS image sensors. [Citation Graph (0, 0)][DBLP ] Conf ] Marco Bucci , Luca Giancane , Raimondo Luzzi , Giuseppe Scotti , Alessandro Trifiletti Enhancing power analysis attacks against cryptographic devices. [Citation Graph (0, 0)][DBLP ] Conf ] A. B. Soares , Altamiro Amadeu Susin , Leticia V. Guimaraes Automatic generation of neural networks for image processing. [Citation Graph (0, 0)][DBLP ] Conf ] Jinn-Shyan Wang , Yu-Juey Chang , Chingwei Yeh , Yuan-Hua Chu Design of STR level converters for SoCs using the multi-island dual-VDD design technique. [Citation Graph (0, 0)][DBLP ] Conf ] Yijun Li , M. Bayoumi A power-efficient architecture for EBCOT tier-1 in JPEG 2000. [Citation Graph (0, 0)][DBLP ] Conf ] Bill Pontikakis , François R. Boyer , Yvon Savaria A 0.8V algorithmically defined buffer and ring oscillator low-energy design for nanometer SoCs. [Citation Graph (0, 0)][DBLP ] Conf ] Soo-Chang Pei , Huei-Shan Lin , Peng-Hua Wang Closed-form design of maximally flat FIR fractional delay filters. [Citation Graph (0, 0)][DBLP ] Conf ] Lijie Liu , Wei Dai , Trac D. Tran JPEG-compliant image coding with adaptive pre-/post-filtering. [Citation Graph (0, 0)][DBLP ] Conf ] Jia-Wei Chen , Kuan-Hung Chen , Jinn-Shyan Wang , Jiun-In Guo A performance-aware IP core design for multimode transform coding using scalable-DA algorithm. [Citation Graph (0, 0)][DBLP ] Conf ] Q. El-Gharniti , E. Kerherve , Jean-Baptiste Begueret Design and modeling of on-chip monolithic transformers with patterned ground shield. [Citation Graph (0, 0)][DBLP ] Conf ] Yijun Zhou , Chee Piew Yoong , Leong Siew Weng , Yin Jee Khoi , M. Chia Yan Wah , K. Ang Chai Moy , D. Wee Tue Fatt A 5 GHz dual-mode WiMAX/WLAN direct-conversion receiver. [Citation Graph (0, 0)][DBLP ] Conf ] Simon Hollis , Simon W. Moore An area-efficient, pulse-based interconnect. [Citation Graph (0, 0)][DBLP ] Conf ] Franklin Bien , Youngsik Hur , Moonkyun Maeng , Hyoungsoo Kim , Edward Gebara , Joy Laskar A reconfigurable fully-integrated 0.18µm CMOS feed forward equalizer IC for 10-Gb/sec backplane links. [Citation Graph (0, 0)][DBLP ] Conf ] Rajesh Thirugnanam , Dong Sam Ha , Bong Hyuk Park , S. S. Choi Design of a tunable fully differential GHz range Gm-C lowpass filter in 0.18µm CMOS for DS-CDMA UWB transceivers. [Citation Graph (0, 0)][DBLP ] Conf ] Yu Wang , Tao Fang , Lap-Pui Chau , Kim-Hui Yap Two-dimensional channel rate allocation for SVC over error-prone channel. [Citation Graph (0, 0)][DBLP ] Conf ] Ravi S. Ananth , Edward K. Lee , Taihu Li , A. Lam Low-power, implantable sensing system for signal detection from the central or peripheral nervous system. [Citation Graph (0, 0)][DBLP ] Conf ] E. Lopelli , Johan van der Tang , Arthur H. M. van Roermund An ultra-low power predistortion-based FHSS transmitter. [Citation Graph (0, 0)][DBLP ] Conf ] G. L. Radulov , Patrick J. Quinn , P. C. W. van Beek , J. A. Hegt , Arthur H. M. van Roermund A binary-to-thermometer decoder with built-in redundancy for improved DAC yield. [Citation Graph (0, 0)][DBLP ] Conf ] Kuo-Hsing Cheng , Chan-Wei Huang , Shu-Yu Jiang Self-sampled vernier delay line for built-in clock jitter measurement. [Citation Graph (0, 0)][DBLP ] Conf ] Jing-Shiun Lin , Chung-Kung Lee , Ming-Der Shieh , Jun-Hong Chen High-speed CRC design for 10 Gbps applications. [Citation Graph (0, 0)][DBLP ] Conf ] James Moritz , Yichuang Sun 100MHz, 6th order, leap-frog gm-C high Q bandpass filter and on-chip tuning scheme. [Citation Graph (0, 0)][DBLP ] Conf ] George Economakos , K. Anagnostopoulos Bit level architectural exploration technique for the design of low power multipliers. [Citation Graph (0, 0)][DBLP ] Conf ] Y. Zhu , J. D. Zuegel , J. R. Marciante , Hui Wu A reconfigurable, multi-gigahertz pulse shaping circuit based on distributed transversal filters. [Citation Graph (0, 0)][DBLP ] Conf ] Borching Su , P. P. Vaidyanathan A generalized deterministic algorithm for blind channel identification with filter bank precoders. [Citation Graph (0, 0)][DBLP ] Conf ] G. Reddy Gangasani , Peter R. Kinget Injection-lock dynamics in non-harmonic oscillators. [Citation Graph (0, 0)][DBLP ] Conf ] Yajuan He , Chip-Hong Chang A low-power, high-speed RB-to-NB converter for fast redundant binary multiplier. [Citation Graph (0, 0)][DBLP ] Conf ] S. Au , Shahriar Mirabbasi , Lutz H.-J. Lampe , Robert Schober Per-survivor processing Viterbi decoder for Bluetooth applications. [Citation Graph (0, 0)][DBLP ] Conf ] Amorn Jiraseree-amornkun , Apisak Worapishet , Eric A. M. Klumperink , Bram Nauta , Wanlop Surakampontorn Slew rate induced distortion in switched-resistor integrators. [Citation Graph (0, 0)][DBLP ] Conf ] Ilhan Kaya , Taskin Koçak Increasing the power efficiency of Bloom filters for network string matching. [Citation Graph (0, 0)][DBLP ] Conf ] Luca Reggiani , A. Tomasetta , Gian Mario Maggio Orthogonal convolutional modulation for UWB impulse radio communications. [Citation Graph (0, 0)][DBLP ] Conf ] H. Mori , S. Saito Power system network topology identification with MLD transform and tabu search. [Citation Graph (0, 0)][DBLP ] Conf ] Sujan Pandey , Manfred Glesner Energy efficient MPSoC on-chip communication bus synthesis using voltage scaling technique. [Citation Graph (0, 0)][DBLP ] Conf ] R. van Veldhoven , P. Nuijten , Paul T. M. van Zeijl The effect of clock jitter on the DR of Sigma Delta modulators. [Citation Graph (0, 0)][DBLP ] Conf ] Yi Chen , Michael D. Adams , Wu-Sheng Lu Design of optimal quincunx filter banks for image coding. [Citation Graph (0, 0)][DBLP ] Conf ] S. Mayilavelane Aroutchelvame , Kaamran Raahemifar An architecture for best-basis algorithm using threshold cost function for images. [Citation Graph (0, 0)][DBLP ] Conf ] Ching-Tung Hsu , Jin-Jang Leou A new motion-compensated error concealment scheme for MPEG-4 video transmission. [Citation Graph (0, 0)][DBLP ] Conf ] J. N. Y. Aziz , Roman Genov Electro-chemical multi-channel integrated neural interface technologies. [Citation Graph (0, 0)][DBLP ] Conf ] Stamatios V. Kartalopoulos Circuit for statistical estimation of BER and SNR in telecommunications. [Citation Graph (0, 0)][DBLP ] Conf ] Carlos Muniz-Montero , Alejandro Díaz-Sánchez , Ramón González Carvajal Offset compensation using unbalanced polarization. [Citation Graph (0, 0)][DBLP ] Conf ] Margarita Kotti , Emmanouil Benetos , Constantine Kotropoulos Automatic speaker change detection with the Bayesian information criterion using MPEG-7 features and a fusion scheme. [Citation Graph (0, 0)][DBLP ] Conf ] Alistair McEwan , Steve Collins A compact direct digital frequency synthesis architecture. [Citation Graph (0, 0)][DBLP ] Conf ] J. Izydorczyk Time delay estimation with coupled LMS filters. [Citation Graph (0, 0)][DBLP ] Conf ] G. Razavipour , A. Motamedi , Ali Afzali-Kusha WL-VC SRAM: a low leakage memory circuit for deep sub-micron design. [Citation Graph (0, 0)][DBLP ] Conf ] Pablo Sergio Mandolesi , P. Julian , Andreas G. Andreou A simplicial CNN visual processor in 3D SOI-CMOS. [Citation Graph (0, 0)][DBLP ] Conf ] Mohammad Hekmat , Shahriar Mirabbasi , Majid Hashemi On the behaviour of passive guard-rings in lightly doped substrates. [Citation Graph (0, 0)][DBLP ] Conf ] Aaron St. Leger , Chika O. Nwankpa Static generator model for analog power flow computation. [Citation Graph (0, 0)][DBLP ] Conf ] Kuo-Chuan Chao , Kuan-Hung Chen , Yuan-Sun Chu , Jiun-In Guo Low-power mechanism with power block management. [Citation Graph (0, 0)][DBLP ] Conf ] S. C. Chan , Y. Zhou Improved generalized-proportionate stepsize LMS algorithms and performance analysis. [Citation Graph (0, 0)][DBLP ] Conf ] Stijn Reekmans , Jeroen De Maeyer , Pieter Rombouts , Ludo Weyten Quadrature mismatch shaping with a complex, tree structured DAC. [Citation Graph (0, 0)][DBLP ] Conf ] Bao-Yun Wang , Wei Xing Zheng Exact BER of transmitter antenna selection/receiver-MRC over spatially correlated Nakagami-fading channels. [Citation Graph (0, 0)][DBLP ] Conf ] Wu-An Kuo , Yi-Ling Chiang , TingTing Hwang , Allen C.-H. Wu Performance-driven crosstalk elimination at post-compiler level. [Citation Graph (0, 0)][DBLP ] Conf ] B. Vujicic , Hao Chen , L. Trajkovic Prediction of traffic in a public safety network. [Citation Graph (0, 0)][DBLP ] Conf ] James Gaston , Kaamran Raahemifar , Peter Hiscocks A cooperative network of reconfigurable stair-climbing robots. [Citation Graph (0, 0)][DBLP ] Conf ] Shingo Yoshizawa , Yoshikazu Miyanaga Tunable word length architecture for low power wireless OFDM demodulator. [Citation Graph (0, 0)][DBLP ] Conf ] Pere Palà-Schönwälder , Jordi Bonet-Dalmau , F. Xavier Moncunill-Geniz , Francisco del Águìla López , M. Rosa Giralt-Mas Exploiting circuit instability to achieve wideband linear amplification. [Citation Graph (0, 0)][DBLP ] Conf ] Stephen B. Furber , Steve Temple , A. Brown On-chip and inter-chip networks for modeling large-scale neural systems. [Citation Graph (0, 0)][DBLP ] Conf ] Virginie Fresse , Nathalie Bochard , Alain Aubert System on chip FPGA designs of a parameterized particle image velocimetry algorithm. [Citation Graph (0, 0)][DBLP ] Conf ] P. Israsena , I. Kale A high-speed, low-power interleaved trace-back memory for Viterbi decoder. [Citation Graph (0, 0)][DBLP ] Conf ] Arantxa Uranga , Jordi Teva , Jaume Verd , J. L. Lopez , F. Torres , Gabriel Abadal , Nuria Barniol , Jaume Esteve , Francesc Pérez-Murano CMOS integrated MEMS resonator for RF applications. [Citation Graph (0, 0)][DBLP ] Conf ] T. Stieglitz Biomedical microimplants for sensory and motor neuroprostheses. [Citation Graph (0, 0)][DBLP ] Conf ] Zhaonian Zhang , Abdullah Celik , Paul Sotiriadis A fast state-space algorithm to estimate harmonic distortion in fully differential weakly nonlinear Gm -C filters. [Citation Graph (0, 0)][DBLP ] Conf ] Qadeer Ahmad Khan , G. K. Siddhartha A sequence independent power-on-reset circuit for multi-voltage systems. [Citation Graph (0, 0)][DBLP ] Conf ] Carlos Aristoteles De la Cruz-Blas , Antonio J. López-Martín Compact power-efficient CMOS exponential voltage-to-voltage converter. [Citation Graph (0, 0)][DBLP ] Conf ] Chutham Sawigun , Jirayuth Mahattanakul A low-voltage CMOS linear transconductor suitable for analog multiplier application. [Citation Graph (0, 0)][DBLP ] Conf ] Tzyy-Kuen Tien , Jing-Jou Tang , Kuan-Jou Chen A new high speed dynamic PLA. [Citation Graph (0, 0)][DBLP ] Conf ] Chun-Hsien Chou , Kuo-Cheng Liu A perceptually optimized watermarking scheme for color visual information. [Citation Graph (0, 0)][DBLP ] Conf ] Kanupriya Gulati , Nikhil Jayakumar , Sunil P. Khatri A probabilistic method to determine the minimum leakage vector for combinational designs. [Citation Graph (0, 0)][DBLP ] Conf ] Pieter Harpe , Athon Zanikopoulos , Hans Hegt , Arthur H. M. van Roermund Digital post-correction of front-end track-and-hold circuits in ADCs. [Citation Graph (0, 0)][DBLP ] Conf ] Patrick Lichtsteiner , Tobi Delbrück , Christoph Posch A 100dB dynamic range high-speed dual-line optical transient sensor with asynchronous readout. [Citation Graph (0, 0)][DBLP ] Conf ] Wu-Sheng Lu , Takao Hinamoto A second-order cone programming approach for minimax design of 2-D FIR filters with low group delay. [Citation Graph (0, 0)][DBLP ] Conf ] X. Zheng , Francis C. M. Lau , C. K. Tse , S. C. Wong Techniques for improving block error rate of LDPC decoders. [Citation Graph (0, 0)][DBLP ] Conf ] Fengling Li , Nam Ling Improved content adaptive update weight control in motion-compensated temporal filtering. [Citation Graph (0, 0)][DBLP ] Conf ] T. Lopez , E. Alarcon Performance of pn-junction diode lumped models for circuit simulators. [Citation Graph (0, 0)][DBLP ] Conf ] P. Bougas , A. Tsirikos , K. Anagnostopoulos , I. Sideris , Kiamal Z. Pekmestzi Segmentation based design of serial parallel multipliers. [Citation Graph (0, 0)][DBLP ] Conf ] Cheng-Liang Chen , Meng-Fen Ho , Chung-Lin Huang Adaptive rate control for H.264/AVC using Kalman filter. [Citation Graph (0, 0)][DBLP ] Conf ] Z. G. Zhang , W. Y. Lau , S. C. Chan A new Kalman filter-based power spectral density estimation for nonstationary pressure signals. [Citation Graph (0, 0)][DBLP ] Conf ] A. K. Das , S. K. Ghosh A bidirectional linear semi-systolic architecture for DCT-domain image resizing processor. [Citation Graph (0, 0)][DBLP ] Conf ] A. Tanaka , H. Torikai , T. Saito A/D and D/A converters by spike-interval modulation of simple spiking neurons. [Citation Graph (0, 0)][DBLP ] Conf ] F. Timischl , T. Inoue , A. Tsuneda Design of a CMOS low-voltage low-power circuit for an integrated pulsed ultrasonic distance measurement system. [Citation Graph (0, 0)][DBLP ] Conf ] Jinyao Zhang , Miodrag Vujkovic , David Wadkins , Carl Sechen Post-layout energy-delay analysis of parallel multipliers. [Citation Graph (0, 0)][DBLP ] Conf ] C. Thakkar , Anindya Sundar Dhar Sampled analog architecture for 2-D DCT. [Citation Graph (0, 0)][DBLP ] Conf ] Mohankumar N. Somasundaram , Dongsheng Ma Integrated low-ripple-voltage fast-response switched-capacitor power converter with interleaving regulation scheme. [Citation Graph (0, 0)][DBLP ] Conf ] Chih-Hao Liu , See-May Phoong , Yuan-Pei Lin On the design of CMFB transceivers for unknown channels. [Citation Graph (0, 0)][DBLP ] Conf ] Jun-Hong Weng , Meng-Ting Tsai , Jung-Mao Lin , Ching-Yuan Yang A 1.8-Gb/s burst-mode clock and data recovery circuit with a 1/4-rate clock technique. [Citation Graph (0, 0)][DBLP ] Conf ] A. Galhardo , J. Goes , N. Paulino Novel linearization technique for low-distortion high-swing CMOS switches with improved reliability. [Citation Graph (0, 0)][DBLP ] Conf ] Kanupriya Gulati , M. Lovell , Sunil P. Khatri Efficient don't care computation for hierarchical designs. [Citation Graph (0, 0)][DBLP ] Conf ] Tadashi Suetsugu , Marian K. Kazimierczuk Integration of class DE inverter for on-chip DC-DC power supplies. [Citation Graph (0, 0)][DBLP ] Conf ] Heyoung Lee , Zeungnam Bien Linear time-varying filter with variable bandwidth. [Citation Graph (0, 0)][DBLP ] Conf ] C. Dumortier , Benoit Gosselin , Mohamad Sawan Wavelet transforms dedicated to compress recorded ENGs from multichannel implants: comparative architectural study. [Citation Graph (0, 0)][DBLP ] Conf ] C. P. L. van Vroonhoven , D. Rocha , M. J. Vellekoop , C. Nohammer A readout circuit for capacitive biosensors with integrated SAR A/D conversion. [Citation Graph (0, 0)][DBLP ] Conf ] E. N. Aghdam , P. Benabes A hardware efficient 3-bit second-order dynamic element matching circuit clocked at 300MHz. [Citation Graph (0, 0)][DBLP ] Conf ] K. C. Tam , S. C. Wong , C. K. Tse Fast analytical approach to finding steady-state waveforms for power electronics circuits using orthogonal polynomial basis functions. [Citation Graph (0, 0)][DBLP ] Conf ] Jeroen De Maeyer , Pieter Rombouts , Ludo Weyten Nyquist criterion based design of continuous time Sigma Delta modulators. [Citation Graph (0, 0)][DBLP ] Conf ] Kristian Granhaug , Snorre Aunet , Tor Sverre Lande Body-bias regulator for ultra low power multifunction CMOS gates. [Citation Graph (0, 0)][DBLP ] Conf ] Shengtian Sang , Xiaoming Li , Yizheng Ye Dependency driven partitioning objects generation for hardware/software partitioning. [Citation Graph (0, 0)][DBLP ] Conf ] Zhuo Zhao , Ping Liang Data partition for wavefront parallelization of H.264 video encoder. [Citation Graph (0, 0)][DBLP ] Conf ] Jui-Chin Chu , Chih-Wen Huang , He-Chun Chen , Keng-Po Lu , Ming-Shuan Lee , Jiun-In Guo , Tien-Fu Chen Design of customized functional units for the VLIW-based multi-threading processor core targeted at multimedia applications. [Citation Graph (0, 0)][DBLP ] Conf ] George E. Antoniou Minimal circuit and state space realization of generalized 3-D lattice-ladder discrete filters. [Citation Graph (0, 0)][DBLP ] Conf ] Jialin Mi , Chunhong Chen , H. K. Kwan Power-oriented delay budgeting for combinational circuits. [Citation Graph (0, 0)][DBLP ] Conf ] Chin-Teng Lin , Sheng-Fu Liang , Yu-Chieh Chen , Yung-Chi Hsu , Li-Wei Ko Driver's drowsiness estimation by combining EEG signal analysis and ICA-based fuzzy neural networks. [Citation Graph (0, 0)][DBLP ] Conf ] Mihai Iordache , Lucia Dumitriu , Florin Constantinescu , Miruna Nitescu A new steady-state analysis method for RF-IC circuits driven by multi-tone signals. [Citation Graph (0, 0)][DBLP ] Conf ] Thitipan Rutpralom , Kosin Chamnongthai , Pinit Kumhom , Monai Krairiksh Nondestructive durian maturity determination by using microwave free space measurement. [Citation Graph (0, 0)][DBLP ] Conf ] Tuhina Samanta , Prasun Ghosal , Hafizur Rahaman , Parthasarathi Dasgupta A heuristic method for constructing hexagonal Steiner minimal trees for routing in VLSI. [Citation Graph (0, 0)][DBLP ] Conf ] Du Chen , Yuan Li , Dongming Xu , John G. Harris , José Carlos Príncipe Asynchronous biphasic pulse signal coding and its CMOS realization. [Citation Graph (0, 0)][DBLP ] Conf ] M. I. Faisal , Magdy A. Bayoumi , Peiyi Zhao A low-power clock frequency multiplier. [Citation Graph (0, 0)][DBLP ] Conf ] Guangtao Zhai , Wenjun Zhang , Xiaokang Yang , Susu Yao , Yi Xu GES: a new image quality assessment metric based on energy features in Gabor transform domain. [Citation Graph (0, 0)][DBLP ] Conf ] Da-Zheng Feng , Wei Xing Zheng An adaptive algorithm for fast identification of FIR systems. [Citation Graph (0, 0)][DBLP ] Conf ] Zbigniew Galias Finite switching frequency effects in the sliding mode control of the double integrator system. [Citation Graph (0, 0)][DBLP ] Conf ] M. Riazati , Ashkan Sobhani , M. Mottaghi-Dastjerdi , Ali Afzali-Kusha , Ali Khakifirooz Low-power multiplier with static decision for input manipulation. [Citation Graph (0, 0)][DBLP ] Conf ] Changqi Yang , S. Goto , T. Ikenaga High performance VLSI architecture of fractional motion estimation in H.264 for HDTV. [Citation Graph (0, 0)][DBLP ] Conf ] Gordon Allan , John Knight Mixed-signal thermometer filtering for low-complexity PLLs/DLLs. [Citation Graph (0, 0)][DBLP ] Conf ] Jacqueline E. Rice A new look at reversible memory elements. [Citation Graph (0, 0)][DBLP ] Conf ] Francisco Tejada , Andreas G. Andreou , Philippe O. Pouliquen Stacked, standing wave detectors in 3D SOI-CMOS. [Citation Graph (0, 0)][DBLP ] Conf ] Boonchai Boonchu , Wanlop Surakampontorn CMOS voltage-mode analog multiplier. [Citation Graph (0, 0)][DBLP ] Conf ] Min Ma , Alfred Tze-Mun Leung , Roni Khazaka Sparse macromodels for parametric networks. [Citation Graph (0, 0)][DBLP ] Conf ] I. Nakanishi , Y. Nagata , Y. Itoh , Y. Fukui Single-channel speech enhancement based on frequency domain ALE. [Citation Graph (0, 0)][DBLP ] Conf ] Zi-Ping Chen , Che-Hao Chuang , Ming-Dou Ker Design on new tracking circuit of I/O buffer in 0.13µm cell library for mixed-voltage application. [Citation Graph (0, 0)][DBLP ] Conf ] Ümit Güz , Hakan Gürkan , B. Siddik Yarman A new speech modeling method: SYMPES. [Citation Graph (0, 0)][DBLP ] Conf ] S. Ozeri , D. Shmilovitz A time domain measurements procedure of piezoelectric transformers equivalent scheme parameters. [Citation Graph (0, 0)][DBLP ] Conf ] Paul T. Watkins , Ryan J. Kier , Robert O. Lovejoy , Daniel J. Black , Reid R. Harrison Signal amplification, detection and transmission in a wireless 100-electrode neural recording system. [Citation Graph (0, 0)][DBLP ] Conf ] O. C. Akgun , Yusuf Leblebici Weak inversion performance of CMOS and DCVSPG logic families in sub-300 mV range. [Citation Graph (0, 0)][DBLP ] Conf ] Takashi Kambe , H. Matsuno , Y. Miyazaki , Akihisa Yamada C-based design of a real time speech recognition system. [Citation Graph (0, 0)][DBLP ] Conf ] J. Van Ham , W. Claes , M. De Cooman , R. Puers , I. Naertcu , Carl Van Lierde , L. J. Beckers Design and integration of a remotely programmable dental monitoring device. [Citation Graph (0, 0)][DBLP ] Conf ] Yasutaka Haga , Richard C. S. Morling , Izzet Kale A new bulk-driven input stage design for sub 1-volt CMOS op-amps. [Citation Graph (0, 0)][DBLP ] Conf ] George T. Zardalidis Simulation of the nano electronic single-electron transistor and the nanoelectronic C-NOT single-electron gate. [Citation Graph (0, 0)][DBLP ] Conf ] Bjørn Jager , Mario Porrmann , Ulrich Rückert Bio-inspired massively parallel architectures for nanotechnologies. [Citation Graph (0, 0)][DBLP ] Conf ] Abdelali El Aroudi , Bruno Robert , Luis Martinez-Salamero Modelling and analysis of multicell converters using discrete time models. [Citation Graph (0, 0)][DBLP ] Conf ] C. Garuda , M. Ismail A multiband CMOS RF front-end for 4G WiMAX and WLAN applications. [Citation Graph (0, 0)][DBLP ] Conf ] Tiantian Sun , Feng Wu , Wen Gao Accurately weighting subbands in temporal wavelet transform. [Citation Graph (0, 0)][DBLP ] Conf ] Holly Pekau , A. Yousif , James W. Haslett A CMOS integrated linear voltage-to-pulse-delay-time converter for time based analog-to-digital converters. [Citation Graph (0, 0)][DBLP ] Conf ] P. Naktongkul , Apinunt Thanachayanont 1.5-V 900-µW 40-dB CMOS variable gain amplifier. [Citation Graph (0, 0)][DBLP ] Conf ] Wei Shu , J. S. Chang , Tong Ge , Meng Tong Tan Fourier series analysis of the nonlinearities in analog closed-loop PWM class D amplifiers. [Citation Graph (0, 0)][DBLP ] Conf ] V. G. Krizhanovski , D. V. Chernov , Marian K. Kazimierczuk Low-voltage self-oscillating class E electronic ballast for fluorescent lamps. [Citation Graph (0, 0)][DBLP ] Conf ] Paolo Checco , Fernando Corinto CNN-based algorithm for drusen identification. [Citation Graph (0, 0)][DBLP ] Conf ] David M. Horan , Richard A. Guinee A novel pseudorandom binary sequence generator for keystream generation. [Citation Graph (0, 0)][DBLP ] Conf ] Mohammed Sayed , Ihab Amer , Wael M. Badawy Towards an H.264/AVC full encoder on chip: an efficient real-time VBSME ASIC chip. [Citation Graph (0, 0)][DBLP ] Conf ] Jin-Tai Yan , Kai-Ping Lin , Yue-Fong Luo Floorplan-aware decoupling capacitance budgeting on equivalent circuit model. [Citation Graph (0, 0)][DBLP ] Conf ] V. Jimenez-Fernandez , L. Hernandez-Martinez , Arturo Sarmiento-Reyes Decomposed piecewise-linear models by hyperplanes unbending. [Citation Graph (0, 0)][DBLP ] Conf ] Leonid Belostotski , James W. Haslett , B. Veidt Wide-band CMOS low noise amplifier for applications in radio astronomy. [Citation Graph (0, 0)][DBLP ] Conf ] Eduard Alarcón , A. El-Aroudi , J. Martinez-Artega , Gerard Villar , Francesc Guinjoan , Alberto Poveda Predicting fast-scale instabilities in switching power converters: a ripple-based unified perspective. [Citation Graph (0, 0)][DBLP ] Conf ] Alessandro Cabrini , L. Gobbi , Guido Torelli Theoretical and experimental analysis of Dickson charge pump output resistance. [Citation Graph (0, 0)][DBLP ] Conf ] A. Amirabadi , A. Chehelcheraghi , S. H. Rasouli , A. Seyedi , Ali Afzali-Kusha Low power and high performance clock delayed domino logic using saturated keeper. [Citation Graph (0, 0)][DBLP ] Conf ] Xiaolin Shi , Shu-hung Leung , Chi-Sing Leung Mean square error analysis of RLS algorithm for WSSUS fading channels. [Citation Graph (0, 0)][DBLP ] Conf ] T. Tikka , Jussi Ryynänen , Mikko Hotti , Kari Halonen Design of a high linearity mixer for direct-conversion base-station receiver. [Citation Graph (0, 0)][DBLP ] Conf ] K. Reddy , S. Pavan Fundamental limitations of continuous-time delta-sigma modulators due to clock jitter. [Citation Graph (0, 0)][DBLP ] Conf ] P. D. Vouzis , M. G. Arnold A parallel search algorithm for CLNS addition optimization. [Citation Graph (0, 0)][DBLP ] Conf ] Milena Radenkovic , Tamal Bose Blind adaptive equalizer for IIR channels with common zeros. [Citation Graph (0, 0)][DBLP ] Conf ] Yu-Ting Kuo , Tay-Jyi Lin , Yi Cho , Chih-Wei Liu , Chein-Wei Jen Programmable FIR filter with adder-based computing engine. [Citation Graph (0, 0)][DBLP ] Conf ] Andrzej Pulka SystemC models generation based on libraries of templates. [Citation Graph (0, 0)][DBLP ] Conf ] Lynda Hardman , Jacco van Ossenbruggen Creating meaningful multimedia presentations. [Citation Graph (0, 0)][DBLP ] Conf ] S. Leeke , L. Maharatna A low-power geometric mapping co-processor for high-speed graphics application. [Citation Graph (0, 0)][DBLP ] Conf ] Timothy D. Strong , Steven M. Martin , R. F. Franklin , Richard B. Brown Integrated electrochemical neurosensors. [Citation Graph (0, 0)][DBLP ] Conf ] Vijay Divi , Gregory W. Wornell Scalable blind calibration of timing skew in high-resolution time-interleaved ADCs. [Citation Graph (0, 0)][DBLP ] Conf ] Emrah Acar , Kanak Agarwal , Sani R. Nassif Characterization of total chip leakage using inverse (reciprocal) gamma distribution. [Citation Graph (0, 0)][DBLP ] Conf ] Elizabeth J. Brauer , Ilhan Hatirnaz , Stéphane Badel , Yusuf Leblebici Via-programmable expanded universal logic gate in MCML for structured ASIC applications: circuit design. [Citation Graph (0, 0)][DBLP ] Conf ] V. A. Pothiwala , Anestis Dounavis Efficient passive transmission line macromodeling algorithm using method of characteristics. [Citation Graph (0, 0)][DBLP ] Conf ] Ferdinando Bedeschi , Chiara Boffino , Edoardo Bonizzoni , Osama Khouri , Giorgio Pollaccia , Claudio Resta , Guido Torelli A low-ripple voltage tripler. [Citation Graph (0, 0)][DBLP ] Conf ] N. Honarmand , M. Reza Javaheri , N. Sedaghati-Mokhtari , Ali Afzali-Kusha Power efficient sequential multiplication using pre-computation. [Citation Graph (0, 0)][DBLP ] Conf ] L. Gobbi , Alessandro Cabrini , Guido Torelli Impact of parasitic elements on CMOS charge pumps: a numerical analysis. [Citation Graph (0, 0)][DBLP ] Conf ] Chunyan Wang Implementation of space-efficient voltage-insensitive capacitances in integrated circuits. [Citation Graph (0, 0)][DBLP ] Conf ] J. N. Y. Aziz , Rafal Karakiewicz , Roman Genov , B. L. Bardakjian , M. Derchansky , P. L. Carlen Real-time seizure monitoring and spectral analysis microsystem. [Citation Graph (0, 0)][DBLP ] Conf ] Heng-Cheng Yeh , Leon Lin Intersymbol and intercarrier interference canceller for multi-carrier modulation receivers. [Citation Graph (0, 0)][DBLP ] Conf ] Zhisheng Duan , Jingxin Zhang , Cishen Zhang , Edoardo Mosca A simple design method of Hinfinity reduced-order filters for stochastic systems. [Citation Graph (0, 0)][DBLP ] Conf ] Jianfeng Chen , Koksoon Phua , Ying Song , Louis Shue A portable phonocardiographic fetal heart rate monitor. [Citation Graph (0, 0)][DBLP ] Conf ] Y. Tsiatouhas , Angela Arapoyanni High fan-in differential current mirror logic. [Citation Graph (0, 0)][DBLP ] Conf ] G. C. Luna , Diego E. Crivelli , Mario Rafael Hueda , Oscar E. Agazzi Compensation of track and hold frequency response mismatches in interleaved analog to digital converters for high-speed communications. [Citation Graph (0, 0)][DBLP ] Conf ] Massimo Alioto , Luca Pancioni , Santina Rocchi , Valerio Vignoli Analysis and design of MCML gates with hysteresis. [Citation Graph (0, 0)][DBLP ] Conf ] Mi-Kyung Oh , Byunghoo Jung , Dong-Jo Park Low-complexity hop timing synchronization in frequency hopping systems. [Citation Graph (0, 0)][DBLP ] Conf ] Daeik D. Kim , Martin A. Brooke Scalable delta-sigma modulator readout architecture for array-based sensor system. [Citation Graph (0, 0)][DBLP ] Conf ] P. Grybos , M. Idzik , K. Swientek , P. Maj Integrated charge sensitive amplifier with pole-zero cancellation circuit for high rates. [Citation Graph (0, 0)][DBLP ] Conf ] Chen Wang , Xiaoyan Sun , Feng Wu , Hongkai Xiong Image compression with structure-aware inpainting. [Citation Graph (0, 0)][DBLP ] Conf ] H. K. Kwan Digital filter bank design using simple subfilters. [Citation Graph (0, 0)][DBLP ] Conf ] Ndubuisi Ekekwe , Ralph Etienne-Cummings , Peter Kazanzides A configurable VLSI chip for DC motor control for compact, low-current robotic systems. [Citation Graph (0, 0)][DBLP ] Conf ] Gunjae Koo , WooChul Jung , Heesub Lee A robust PRML read channel with digital timing recovery for multi-format optical disc. [Citation Graph (0, 0)][DBLP ] Conf ] Chua-Chin Wang , Ching-Li Lee , Wun-Ji Lin A 4-Kb low power 4-T SRAM design with negative word-line gate drive. [Citation Graph (0, 0)][DBLP ] Conf ] J. A. P. Reyes , L. P. Alarcon , L. Alarilla Jr. A study of floating-point architectures for pipelined RISC processors. [Citation Graph (0, 0)][DBLP ] Conf ] N. Takahashi , T. Nishi A sufficient condition for 1D CNNs with antisymmetric templates to perform connected component detection. [Citation Graph (0, 0)][DBLP ] Conf ] Appaya Devaraj Swaminathan , Nastooh Avessta Integer linear programming method for spatial temporal mapping of the Viterbi decoder. [Citation Graph (0, 0)][DBLP ] Conf ] Daniel Larkin , Vlenti. Muresan , Noel E. O'Connor A low complexity hardware architecture for motion estimation. [Citation Graph (0, 0)][DBLP ] Conf ] Yu M. Chi , Udayan Mallik , Edward Choi , Matthew A. Clapp , G. Gauwenberghs , Ralph Etienne-Cummings CMOS pixel-level ADC with change detection. [Citation Graph (0, 0)][DBLP ] Conf ] W. Jaikla , K. Sooksood , Montree Siripruchyanun Current controlled CDBAs (CCCDBAs)-based novel current-mode universal biquadratic filter. [Citation Graph (0, 0)][DBLP ] Conf ] Gordon Allan , John Knight A compact 190µW PLL for clock control and distribution in ultra-large scale ICs. [Citation Graph (0, 0)][DBLP ] Conf ] Siyue Chen , Henry Leung Concurrent data transmission through PSTN by CDMA. [Citation Graph (0, 0)][DBLP ] Conf ] Paolo Checco , Mario Biey , G. Vattay , Ljupco Kocarev Complex network topologies and synchronization. [Citation Graph (0, 0)][DBLP ] Conf ] Youngkwon Jo , Yong Shim , Soo Hwan Kim , Suki Kim , Kwanjun Cho A mixed-structure delay locked-loop with wide range and fast locking. [Citation Graph (0, 0)][DBLP ] Conf ] Chin-Teng Lin , Yuan-Chu Yu , Lan-Da Van A low-power 64-point FFT/IFFT design for IEEE 802.11a WLAN application. [Citation Graph (0, 0)][DBLP ] Conf ] Filipe C. C. B. Diniz , Sergio L. Netto , Paulo M. T. de Oliveira , Márcio N. de Souza On the wavelet-based elimination of stimulus artifacts in click-evoked otoacoustic emissions. [Citation Graph (0, 0)][DBLP ] Conf ] Zhi Huo , Qishan Zhang , S. Haruehanroengra , Wei Wang Logic optimization for majority gate-based nanoelectronic circuits. [Citation Graph (0, 0)][DBLP ] Conf ] Le Viet Hoang , Trung-Kien Nguyen , Seok-Kyun Han , Sang-Gug Lee , S. B. Hyun Low power high linearity transmitter front-end for 900 MHz Zigbee applications. [Citation Graph (0, 0)][DBLP ] Conf ] Jun-Hong Weng , Chong-Jng Yu , Ching-Yuan Yang , Peng-Chang Yang A low-noise microsensor amplifier with automatic gain control system. [Citation Graph (0, 0)][DBLP ] Conf ] Xinping Huang , Zhiwen Zhu , M. Caron A 30GHz 155Mbit/s self-calibrating direct transmitter. [Citation Graph (0, 0)][DBLP ] Conf ] Peter Rauschert , Arasch Honarbacht , Anton Kummert Synchronization of multihop ad hoc networks using connected dominating sets. [Citation Graph (0, 0)][DBLP ] Conf ] He Zheng , Hanying Hu MMSE-based design of scaled and offset BP-based decoding algorithms on the fast Rayleigh fading channel. [Citation Graph (0, 0)][DBLP ] Conf ] Francisco-Javier Veredas , Michael Scheppler , Bumei Zhai , Hans-Jörg Pfleiderer LUT-based MPGAs for fast turnaround time conversion flow. [Citation Graph (0, 0)][DBLP ] Conf ] Z. Nagy , Z. Voroshazi , Péter Szolgay An advanced emulated digital retina model on FPGA to implement a real-time test environment. [Citation Graph (0, 0)][DBLP ] Conf ] Houman Rastgar , Majid Ahmadi , Maher A. Sid-Ahmed 3D position sensing using a Hopfield neural network stereo matching algorithm. [Citation Graph (0, 0)][DBLP ] Conf ] Yi-Da Wu , Chang-Ming Lai , Chih-Yuan Chou , Po-Chiun Huang An OPLL-DDS based frequency synthesizer for DCS-1800 receiver. [Citation Graph (0, 0)][DBLP ] Conf ] Leonardo Barboni , Rafaella Fiorelli , F. Silveira A tool for design exploration and power optimization of CMOS RF circuits blocks. [Citation Graph (0, 0)][DBLP ] Conf ] Benoit Gosselin , A. E. Ayoub , Mohamad Sawan A low-power bioamplifier with a new active DC rejection scheme. [Citation Graph (0, 0)][DBLP ] Conf ] R. Jancke , P. Schwarz Supporting analog synthesis by abstracting circuit behavior using a modeling methodology. [Citation Graph (0, 0)][DBLP ] Conf ] Donald M. Monro Basis picking for matching pursuits audio compression. [Citation Graph (0, 0)][DBLP ] Conf ] Satoshi Komatsu , Masahiro Fujita An optimization of bus interconnects pitch for low-power and reliable bus encoding scheme. [Citation Graph (0, 0)][DBLP ] Conf ] Yuan Tai Hsu , Long-Wen Chang A new construction algorithm of visual crytography for gray level images. [Citation Graph (0, 0)][DBLP ] Conf ] Tien-Yu Lo , Chung-Chih Hung A high speed and high linearity OTA in 1-V power supply voltage. [Citation Graph (0, 0)][DBLP ] Conf ] Christian Krätzer , Jana Dittmann , Thomas Vogel , Reyk Hillert Design and evaluation of steganography for voice-over-IP. [Citation Graph (0, 0)][DBLP ] Conf ] Ricardo Merched , I. S. Gadelha Figueiredo Block precoder-based energy constrained DFE. [Citation Graph (0, 0)][DBLP ] Conf ] Adarsh Golikeri , Panos Nasiopoulos , Z. J. Wang An improved scalar quantization-based digital video watermarking scheme for H.264/AVC. [Citation Graph (0, 0)][DBLP ] Conf ] Honghao Ji , Pamela Abshire A CMOS image sensor for low light applications. [Citation Graph (0, 0)][DBLP ] Conf ] Igor M. Filanovsky , Ahmed Allam , Luís Bica Oliveira , Jorge R. Fernandes Quadrature Van der Pol oscillators using second harmonic coupling. [Citation Graph (0, 0)][DBLP ] Conf ] Xiao-Yong He , Kong-Pang Pun , Oliver Chiu-sing Choy , Cheong-fat Chan A 0.5V fully differential OTA with local common feedback. [Citation Graph (0, 0)][DBLP ] Conf ] Trung-Kien Nguyen , Sang-Gug Lee Low-voltage, low-power CMOS operation transconductance amplifier with rail-to-rail differential input range. [Citation Graph (0, 0)][DBLP ] Conf ] Houman Zarrabi , Haydar Saaied , Asim J. Al-Khalili , Yvon Savaria Zero skew differential clock distribution network. [Citation Graph (0, 0)][DBLP ] Conf ] Yang Xiao , Ling-yun Lu , Moon Ho Lee FIR-RAKE receiver for TD-SCDMA mobile terminals. [Citation Graph (0, 0)][DBLP ] Conf ] S. Lesueur , Daniel Massicotte , P. Sicard A full-differential analog design of an indirect inverse control law based on neural networks. [Citation Graph (0, 0)][DBLP ] Conf ] Paolo Arena , Luigi Fortuna , Mattia Frasca , Luca Patané , M. Pavone Realization of a CNN-driven cockroach-inspired robot. [Citation Graph (0, 0)][DBLP ] Conf ] Erhan Ozalevli , Muhammad S. Qureshi , Paul E. Hasler Low-voltage floating-gate CMOS buffer. [Citation Graph (0, 0)][DBLP ] Conf ] A. Murat Tekalp Semantic multimedia analysis for content-adaptive video streaming. [Citation Graph (0, 0)][DBLP ] Conf ] Erik Backenius , Erik Sall , Oscar Gustafsson Bidirectional conversion to minimum signed-digit representation. [Citation Graph (0, 0)][DBLP ] Conf ] Yuxiang Zheng , Jiang Li , Jin Liu , Qian Yu Automatic within-pair-skew compensation for 6.25 Gbps differential links using wide-bandwidth delay units. [Citation Graph (0, 0)][DBLP ] Conf ] M. Abdulai , Peter R. Kinget A 0.5 V fully differential gate-input operational transconductance amplifier with intrinsic common-mode rejection. [Citation Graph (0, 0)][DBLP ] Conf ] Win Chaivipas , Akira Matsuzawa , Philipus Chandra Oh Feedforward compensation technique for all digital phase locked loop based synthesizers. [Citation Graph (0, 0)][DBLP ] Conf ] Chang Hee Hyung , Jin Bong Sung , Jung Hwan Hwang , Jin Kyung Kim , Duck Gun Park , Sung Weon Kang A novel system for intrabody communication: touch-and-play. [Citation Graph (0, 0)][DBLP ] Conf ] José Luis Merino , Lluís Teres , Jordi Carrabina A current copying structure for current-mode monotonic digital-to-analog converters. [Citation Graph (0, 0)][DBLP ] Conf ] M. Fujishima , M. Shimura On-chip high-speed solver of inverse problems based on quantum-computing principle. [Citation Graph (0, 0)][DBLP ] Conf ] Yodchanan Wongsawat , Soontorn Oraintara , T. Tanaka , K. R. Rao Lossless multi-channel EEG compression. [Citation Graph (0, 0)][DBLP ] Conf ] A. K. Gupta , E. Sanchez-Sinencio , S. Karthikeyan , Wern Ming Koe , Yong-In Park Second order dynamic element matching technique for low oversampling delta sigma ADC. [Citation Graph (0, 0)][DBLP ] Conf ] C. Shahnaz , Wei-Ping Zhu , M. Omair Ahmad A multifeature voiced/unvoiced decision algorithm for noisy speech. [Citation Graph (0, 0)][DBLP ] Conf ] S. S. Modi , P. R. Wilson , A. D. Brown Power aware learning for class AB analogue VLSI neural network. [Citation Graph (0, 0)][DBLP ] Conf ] Jun Inagaki , J. Nakajima , Miki Haseyama A multiobjective service restoration method for power distribution systems. [Citation Graph (0, 0)][DBLP ] Conf ] Armin Tajalli , Paul Muller , Seyed Mojtaba Atarodi , Yusuf Leblebici Analysis and modeling of jitter and frequency tolerance in gated oscillator based CDRs. [Citation Graph (0, 0)][DBLP ] Conf ] Xiaoying Wang , Lars Hedrich Hierarchical exploration and selection of transistor-topologies for analog circuit design. [Citation Graph (0, 0)][DBLP ] Conf ] Cheng-Yu Chang , You-Sheng Yeh , Pau-Choo Chung , Jar-Ferr Yang A real-time vision-interactive guiding system. [Citation Graph (0, 0)][DBLP ] Conf ] Guobin Shen , Yuwen He , Wanyong Cao , Shipeng Li Complexity scalable MPEG-2 to WMV transcoder with adaptive error compensation. [Citation Graph (0, 0)][DBLP ] Conf ] Paola Hobson , Yiannis Kompatsiaris Advances in semantic multimedia analysis for personalised content access. [Citation Graph (0, 0)][DBLP ] Conf ] Ming-Hua Tsai , Chieh-Ling Huang , Pau-Choo Chung , Yen-Kuang Yang , Yu-Chia Hsu , Shu-Ling Hsiao A psychiatric patients tracking system. [Citation Graph (0, 0)][DBLP ] Conf ] S. A. Huss Analog circuit synthesis: a search for the Holy Grail? [Citation Graph (0, 0)][DBLP ] Conf ] Bin Feng , Guangxi Zhu , WenYu Liu Fast adaptive inter-prediction mode decision method for H.264 based on spatial correlation. [Citation Graph (0, 0)][DBLP ] Conf ] Xiangyang Ji , Debin Zhao , Wen Gao , Jizheng Xu , Feng Wu An efficient SNR scalability coding framework hybrid open-close loop FGS coding. [Citation Graph (0, 0)][DBLP ] Conf ] C. F. Moyano , Roberto S. Salgado , Luciano V. Barboza On the determination of adjusted OPF solutions. [Citation Graph (0, 0)][DBLP ] Conf ] G. W. Chang , Cheng-Yi Chen , Meng-Chi Wu Measuring harmonics by an improved FFT-based algorithm with considering frequency variations. [Citation Graph (0, 0)][DBLP ] Conf ] Hassan El Aabbaoui , B. Gorisse , N. Rolland , Aziz Benlarbi-Delai , J.-F. Lampin , P.-A. Rolland , V. Allouche , N. Fel , B. Riondet , P. Leclerc 20GHz bandwidth digitizer for single shot analysis. [Citation Graph (0, 0)][DBLP ] Conf ] Hsun-Chieh Yu , Rung-Bin Lin Is more redundancy better for on-chip bus encoding. [Citation Graph (0, 0)][DBLP ] Conf ] Yun Tang , Lifeng Sun , Meng Zhang , Shiqiang Yang , Yuzhuo Zhong On deployment of overlay network for live video streaming. [Citation Graph (0, 0)][DBLP ] Conf ] Calin Ciordas , Kees Goossens , Andrei Radulescu , Twan Basten NoC monitoring: impact on the design flow. [Citation Graph (0, 0)][DBLP ] Conf ] P. Varzakas Optimal distance estimation for the spectral efficiency of an hybrid cellular DS/SFH CDMA system. [Citation Graph (0, 0)][DBLP ] Conf ] Tong Ge , J. S. Chang , Wei Shu Modeling and analysis of PSRR in analog PWM class D amplifiers. [Citation Graph (0, 0)][DBLP ] Conf ] Jaime Ramírez-Angulo , Milind S. Sawant , Ramón González Carvajal , Antonio J. López-Martín New compact and power efficient dynamically biased cascode mirrors and telescopic op-amps. [Citation Graph (0, 0)][DBLP ] Conf ] S. Tayu , K. Nomura , S. Ueno On the two-dimensional orthogonal drawing of series-parallel graphs. [Citation Graph (0, 0)][DBLP ] Conf ] Zbigniew Galias Short periodic orbits and topological entropy for the Chua's circuit. [Citation Graph (0, 0)][DBLP ] Conf ] Carlos Aristoteles De la Cruz-Blas , Antonio J. López-Martín , Alfonso Carlosena , L. Hernandez , A. Sarmiento 1.5-V square-root domain first-order filter with multiple operating points. [Citation Graph (0, 0)][DBLP ] Conf ] Heng-Yao Lin , Jwu-Jin Yang , Bin-Da Liu , Jar-Ferr Yang Efficient deblocking filter architecture for H.264 video coders. [Citation Graph (0, 0)][DBLP ] Conf ] Ami Castonguay , Yvon Savaria Architecture of a hypertransport tunnel. [Citation Graph (0, 0)][DBLP ] Conf ] Young Eun Kim , J. O. Yoon , K. J. Cho , J. G. Chung , S. I. Cho , S. S. Choi Efficient design of modified Booth multipliers for predetermined coefficients. [Citation Graph (0, 0)][DBLP ] Conf ] T. Yamakawa , T. Inoue , A. Nakajima , T. Yonezawa , A. Tsuneda A circuit design of ID-code and heartbeat signal processing blocks of a smart RFID tag for mice. [Citation Graph (0, 0)][DBLP ] Conf ] Yutaka Jitsumatsu , Tohru Kohda Gaussian chip shaping enhances the superiority of Markovian codes in DS/CDMA systems. [Citation Graph (0, 0)][DBLP ] Conf ] Fadi A. Aloul , A. Sagahyroon Estimation of the weighted maximum switching activity in combinational CMOS circuits. [Citation Graph (0, 0)][DBLP ] Conf ] D. Ozis , Jeyanandh Paramesh , David J. Allstot Analysis and design of lumped-element quadrature couplers with lossy passive elements. [Citation Graph (0, 0)][DBLP ] Conf ] Xinhua Zhuang , Li Liu , Junqiang Lan SNR-based frame-level video bit rate allocation. [Citation Graph (0, 0)][DBLP ] Conf ] Jayawant Kakade , Dimitrios Kagaris Phase shifts and linear dependencies. [Citation Graph (0, 0)][DBLP ] Conf ] Noel E. O'Connor , Hyowon Lee , Alan F. Smeaton , Gareth J. F. Jones , Eddie Cooke , H. Le Borgne , Cathal Gurrin Fischlar-TRECVid-2004: combined text- and image-based searching of video archives. [Citation Graph (0, 0)][DBLP ] Conf ] H. Cheng , Z. G. Zhang , S. C. Chan Robust channel estimation and multiuser detection for MC-CDMA systems under narrowband interference. [Citation Graph (0, 0)][DBLP ] Conf ] N. Srisawaivilai , Supavadee Aramvith Improved frame and basic unit layers bit allocation scheme for H.264 video transmission over ARQ-based wireless channels. [Citation Graph (0, 0)][DBLP ] Conf ] Hadi Parandeh-Afshar , Ali Afzali-Kusha , Ali Khakifirooz A very high performance address BUS encoder. [Citation Graph (0, 0)][DBLP ] Conf ] Kambiz K. Moez , Mohammad Ibrahim Elmasry A novel loss compensation technique for broadband CMOS distributed amplifiers. [Citation Graph (0, 0)][DBLP ] Conf ] Miguel Angel Domínguez , José L. Ausín , J. Francisco Duque-Carrillo , Guido Torelli A high-quality sine-wave oscillator for analog built-in self-testing. [Citation Graph (0, 0)][DBLP ] Conf ] Wu-Sheng Lu An argument-principle based stability criterion and application to the design of IIR digital filters. [Citation Graph (0, 0)][DBLP ] Conf ] Jin-Fa Lin , Yin-Tsung Hwang , Ming-Hwa Sheu , Cheng-Che Ho A high speed and energy efficient full adder design using complementary & level restoring carry logic. [Citation Graph (0, 0)][DBLP ] Conf ] M. Safi-Harb , G. W. Roberts A CMOS circuit for embedded GHz measurement of digital signal rise time degradation. [Citation Graph (0, 0)][DBLP ] Conf ] H. Mori , Y. Yamada Two-layered neighborhood tabu search for multi-objective distribution network expansion planning. [Citation Graph (0, 0)][DBLP ] Conf ] Zhenyan Li , Yap-Peng Tan Content-based video copy detection with video signature. [Citation Graph (0, 0)][DBLP ] Conf ] Nicolás J. Medrano-Marqués , Guillermo Zatorre , Santiago Celma Sensor compensation using analogue-digital adaptive circuits. [Citation Graph (0, 0)][DBLP ] Conf ] M. Saffari , Seyed Mojtaba Atarodi , Armin Tajalli A 1/4 rate linear phase detector for PLL-based CDR circuits. [Citation Graph (0, 0)][DBLP ] Conf ] Jie Yuan , Nabil Farhat , Jan Van der Spiegel A CMOS monolithic implementation of a nonlinear interconnection module for a corticonic network. [Citation Graph (0, 0)][DBLP ] Conf ] Cameron T. Charles , David J. Allstot A variable-offset phase detector for phased-array applications. [Citation Graph (0, 0)][DBLP ] Conf ] Hiroki Sugano , Hiroshi Tsutsui , Takahiko Masuzaki , Takao Onoye , Hiroyuki Ochi , Yukihiro Nakamura Efficient memory architecture for JPEG2000 entropy codec. [Citation Graph (0, 0)][DBLP ] Conf ] Masayoshi Oda , Yoshihiro Yamagami , Yoshifumi Nishio , Junji Kawata , Akio Ushida A new Spice-oriented frequency-domain optimization technique. [Citation Graph (0, 0)][DBLP ] Conf ] Yuan Chen , Fei Xia , Alexandre Yakovlev Virtual self-timed blocks for systems-on-chip. [Citation Graph (0, 0)][DBLP ] Conf ] Koray Karahaliloglu , P. Gans , Nathan Schemm , Sina Balkir Optical sensor integrated CNN for real-time computational applications. [Citation Graph (0, 0)][DBLP ] Conf ] Hadi Esmaeilzadeh , Pooya Saeedi , Babak Nadjar Araabi , Caro Lucas , Seid Mehdi Fakhraie Neural network stream processing core (NnSP) for embedded systems. [Citation Graph (0, 0)][DBLP ] Conf ] Jinke Yao , Baoyong Chi , Zhihua Wang A 4MHz Gm-C filter with on-chip frequency automatic tuning. [Citation Graph (0, 0)][DBLP ] Conf ] Daniel Mueller , Guido Stehr , Helmut E. Graeb , Ulf Schlichtmann Fast evaluation of analog circuit structures by polytopal approximations. [Citation Graph (0, 0)][DBLP ] Conf ] Erwan Piriou , Christophe Jégo , Patrick Adde , R. Le Bidan , Michel Jézéquel Efficient architecture for Reed Solomon block turbo code. [Citation Graph (0, 0)][DBLP ] Conf ] Jonathan A. Clarke , Altaf Abdul Gaffar , George A. Constantinides , Peter Y. K. Cheung Fast word-level power models for synthesis of FPGA-based arithmetic. [Citation Graph (0, 0)][DBLP ] Conf ] Hong-Yi Huang , Chia-Ming Liang , Wei-Ming Chiu 1-99% input duty 50% output duty cycle corrector. [Citation Graph (0, 0)][DBLP ] Conf ] Md. Imamul Hassan Bhuiyan , M. Omair Ahmad , M. N. S. Swamy Wavelet-based spatially adaptive method for despeckling SAR images. [Citation Graph (0, 0)][DBLP ] Conf ] Matthieu Arzel , Fabrice Seguin , Cyril Lahuec , Michel Jézéquel Semi-iterative analog turbo decoding. [Citation Graph (0, 0)][DBLP ] Conf ] Jaber A. Abu-Qahouq , Wisam Al-Hoor , Liangbin Yao , Issa Batarseh Drive voltage optimization controller to improve efficiency. [Citation Graph (0, 0)][DBLP ] Conf ] C. Yang , A. Mason Zero-IF VGA with novel offset cancellation. [Citation Graph (0, 0)][DBLP ] Conf ] S. Haene , Andreas Burg , David Perels , P. Luethi , Norbert Felber , Wolfgang Fichtner Silicon implementation of an MMSE-based soft demapper for MIMO-BICM. [Citation Graph (0, 0)][DBLP ] Conf ] Ivan Padilla , Jaime Ramírez-Angulo , Ramón González Carvajal , Antonio J. López-Martín , Alfonso Carlosena Compact implementation of linear weighted CMOS transconductance adder based on the flipped voltage follower. [Citation Graph (0, 0)][DBLP ] Conf ] Pui-In Mak , Seng-Pan U. , Rui Paulo Martins Design and test strategy underlying a low-voltage analog-baseband IC for 802.11a/b/g WLAN SiP receivers. [Citation Graph (0, 0)][DBLP ] Conf ] M. Abdalla , G. V. Eleftheriades , Khoman Phang A differential 0.13µm CMOS active inductor for high-frequency phase shifters. [Citation Graph (0, 0)][DBLP ] Conf ] Chia-Tsun Wu , Wei Wang , I-Chyn Wey , An-Yeu Wu A frequency estimation algorithm for ADPLL designs with two-cycle lock-in time. [Citation Graph (0, 0)][DBLP ] Conf ] Ali Bilgin , Michael W. Marcellin JPEG2000 for digital cinema. [Citation Graph (0, 0)][DBLP ] Conf ] B. Kheradmand-Boroujeni , F. Aezinia , Ali Afzali-Kusha High performance circuit techniques for dynamic OR gates. [Citation Graph (0, 0)][DBLP ] Conf ] Zheng Yang , Viktor Gruev , Jan Van der Spiegel A CMOS linear voltage/current dual-mode imager. [Citation Graph (0, 0)][DBLP ] Conf ] Jerald Yoo , Sunyoung Kim , Namjun Cho , Seong-Jun Song , Hoi-Jun Yoo A 10µW digital signal processor with adaptive-SNR monitoring for a sub-1V digital hearing aid. [Citation Graph (0, 0)][DBLP ] Conf ] A. Kumar , P. E. Allen Q locked loop to tune a high-Q high-frequency bandpass filter. [Citation Graph (0, 0)][DBLP ] Conf ] Alessandro Cabrini , Franco Maloberti , Riccardo Rovatti , Gianluca Setti On-line calibration of offset and gain mismatch in time-interleaved ADC using a sampled-data chaotic bit-stream. [Citation Graph (0, 0)][DBLP ] Conf ] Henrique C. Freitas , Milene Barbosa Carvalho , Alexandre Marques Amaral , Amanda R. M. Diniz , Carlos Augusto Paiva da Silva Martins , Luiz Eduardo da Silva Ramos Reconfigurable crossbar switch architecture for network processors. [Citation Graph (0, 0)][DBLP ] Conf ] J. C. Chen , Chun-Fu Shen , Shao-Yi Chien CRISP: coarse-grain reconfigurable image signal processor for digital still cameras. [Citation Graph (0, 0)][DBLP ] Conf ] Volkan Kursun , Zhiyu Liu Wide temperature spectrum low leakage dynamic circuit technique for sub-65nm CMOS technologies. [Citation Graph (0, 0)][DBLP ] Conf ] D. Ho , Kris Iniewski , Soraya Kasnavi , A. Ivanov , S. Natarajan Ultra-low power 90nm 6T SRAM cell for wireless sensor network applications. [Citation Graph (0, 0)][DBLP ] Conf ] D. Kawazoe , Hirotaka Sugawara , T. Ito , Kenichi Okada , Kazuya Masu Reconfigurable CMOS low noise amplifier for self compensation. [Citation Graph (0, 0)][DBLP ] Conf ] Mohammad Sharifkhani , Manoj Sachdev A phase-domain 2nd-order continuous time Delta-Sigma-modulator for frequency digitization. [Citation Graph (0, 0)][DBLP ] Conf ] I. Shcherback , R. Segal , Alexander Belenky , Orly Yadid-Pecht Two-dimensional CMOS image sensor characterization. [Citation Graph (0, 0)][DBLP ] Conf ] J. K. Molinar-Solis , F. Gomez-Castenada , J. A. Moreno-Cadenas , V. H. Ponce-Ponce Very fast programmable CNN based on FG-inverter. [Citation Graph (0, 0)][DBLP ] Conf ] Walter D. Leon-Salas , Sina Balkir , Khalid Sayood , Michael W. Hoffman , Nathan Schemm A CMOS imager with focal plane compression. [Citation Graph (0, 0)][DBLP ] Conf ] M. Daphtary , S. Sonkusale Broadband capacitive sensor CMOS interface circuit for dielectric spectroscopy. [Citation Graph (0, 0)][DBLP ] Conf ] R. Rocher , Nicolas Hervé , Daniel Menard , Olivier Sentieys Fixed-point configurable hardware components for adaptive filters. [Citation Graph (0, 0)][DBLP ] Conf ] Y. Toyosaki , Tetsushi Ueta , Takuji Kousaka Switch synchronizing delayed feedback control for piecewise linear systems. [Citation Graph (0, 0)][DBLP ] Conf ] Yu-Jen Wang , Chao-Chung Cheng , Tian-Sheuan Chang A fast fractional pel motion estimation algorithm for H.264/MPEG-4 AVC. [Citation Graph (0, 0)][DBLP ] Conf ] Chih-Da Chien , Keng-Po Lu , Yi-Hung Shih , Jiun-In Guo A high performance CAVLC encoder design for MPEG-4 AVC/H.264 video coding applications. [Citation Graph (0, 0)][DBLP ] Conf ] K. Hayashi , T. Hisakado Signal expression based on equivalence of time resolution and quantization level. [Citation Graph (0, 0)][DBLP ] Conf ] Eugenio Culurciello , Philippe O. Pouliquen , Andreas G. Andreou Digital phase-shift modulation for an isolation buffer in silicon-on-sapphire CMOS. [Citation Graph (0, 0)][DBLP ] Conf ] Baoyong Chi , Bingxue Shi , Zhihua Wang A CMOS down-conversion micromixer for IEEE 802.11b WLAN transceivers. [Citation Graph (0, 0)][DBLP ] Conf ] Florin Constantinescu , A. Gheorghe , C. D. Ioan , Miruna Nitescu , Mihai Iordache , Lucia Dumitriu A new approach to the computation of reduced order models for one-port and two-port RC circuits. [Citation Graph (0, 0)][DBLP ] Conf ] Michael K. Cheng , Bruce E. Moision , Jon Hamkins , Michael A. Nakashima An interleaver implementation for the serially concatenated pulse-position modulation decoder. [Citation Graph (0, 0)][DBLP ] Conf ] Sai-Weng Sin , Seng-Pan U. , Rui Paulo Martins A novel low-voltage finite-gain compensation technique for high-speed reset- and switched-opamp circuits. [Citation Graph (0, 0)][DBLP ] Conf ] S. C. Chan , W. Y. Lau , C. H. Leung A new recursive algorithm for estimating the adaptive function coefficients autoregressive (AFAR) models in impulsive noise environment. [Citation Graph (0, 0)][DBLP ] Conf ] Hui Cheng , Arkady Kopansky , Michael A. Isnardi Reduced resolution residual coding for H.264-based compression system. [Citation Graph (0, 0)][DBLP ] Conf ] Ippei Akita , Kazuyuki Wada , Yoshiaki Tadokoro Low-voltage CMOS syllabic-companding log domain filter. [Citation Graph (0, 0)][DBLP ] Conf ] Young Jae Lee , Hyun-Kyu Yu A transformer-based low phase noise and widely tuned CMOS quadrature VCO. [Citation Graph (0, 0)][DBLP ] Conf ] A. Kammoun , N. Beilleau , Hassan Aboushady Undersampled LC bandpass Sigma Delta modulators with feedback FIRDACs. [Citation Graph (0, 0)][DBLP ] Conf ] Ryan J. Kier , Reid R. Harrison Power minimization of a 433-MHz LC VCO for an implantable neural recording system. [Citation Graph (0, 0)][DBLP ] Conf ] Shaodan Ma , Ngai Wong , Tung-Sang Ng Time domain equalization for OFDM systems. [Citation Graph (0, 0)][DBLP ] Conf ] Zhiping Lin , Hongtao Yu , Feng Pan A scalable fast mode decision algorithm for H.264. [Citation Graph (0, 0)][DBLP ] Conf ] Dimitrios M. Schinianakis , Apostolos P. Fournaris , Athanasios Kakarountas , Thanos Stouraitis An RNS architecture of an Fp elliptic curve point multiplier. [Citation Graph (0, 0)][DBLP ] Conf ] Vincenzo Ferragina , Nicola Ghittori , Franco Maloberti Low-power 6-bit flash ADC for high-speed data converters architectures. [Citation Graph (0, 0)][DBLP ] Conf ] Jaewook Kim , SeongHwan Cho A time-based analog-to-digital converter using a multi-phase voltage controlled oscillator. [Citation Graph (0, 0)][DBLP ] Conf ] Damien Lefol , David R. Bull , Cedric Nishan Canagarajah Mode refinement algorithm for H.264 intra frame requantization. [Citation Graph (0, 0)][DBLP ] Conf ] Kuang-Hao Lin , Hsin-Lei Lin , Shih-Ming Wang , Robert C. Chang Implementation of digital IQ imbalance compensation in OFDM WLAN receivers. [Citation Graph (0, 0)][DBLP ] Conf ] Haleh Vahedi , Radu Muresan , Stefano Gregori On-chip current flattening circuit with dynamic voltage scaling. [Citation Graph (0, 0)][DBLP ] Conf ] Andreas Burg , S. Haene , David Perels , P. Luethi , Norbert Felber , Wolfgang Fichtner Algorithm and VLSI architecture for linear MMSE detection in MIMO-OFDM systems. [Citation Graph (0, 0)][DBLP ] Conf ] Mallesh Rajashekharaiah , Parag Upadhyaya , Deuk Hyoun Heo Enhanced gm3 cancellation for linearity improvement in CMOS LNAs. [Citation Graph (0, 0)][DBLP ] Conf ] T. Janik , E. Liau , H. Lorenz , M. Menke , E. Plaettner , J. Schweden , H. Seitz , E. Vega-Ordonez A 1.8V p(seudo)SRAM using standard 140nm DRAM technology with self adapting clocked standby operation. [Citation Graph (0, 0)][DBLP ] Conf ] Cesare Alippi , C. Galperti An adaptive maximum power point tracker for maximising solar cell efficiency in wireless sensor nodes. [Citation Graph (0, 0)][DBLP ] Conf ] Mika Laiho , Ari Paasio , Victor M. Brea Effect of mismatch on the reliability of binary-programmable CNNs. [Citation Graph (0, 0)][DBLP ] Conf ] Omid Oliaei Synchronization and phase synthesis using PLL neural networks. [Citation Graph (0, 0)][DBLP ] Conf ] Heather A. Wake , Daeik D. Kim , Martin A. Brooke Mixed-signal implementation of a nonlinear decoder for delta-sigma encoded stream. [Citation Graph (0, 0)][DBLP ] Conf ] Gwo Giun Lee , Drew Wei-Chi Su , He-Yuan Lin , Ming-Jiun Wang Multiresolution-based texture adaptive motion detection for de-interlacing. [Citation Graph (0, 0)][DBLP ] Conf ] Wei Liu , Danilo P. Mandic , Andrzej Cichocki Blind source extraction of instantaneous noisy mixtures using a linear predictor. [Citation Graph (0, 0)][DBLP ] Conf ] Wentai Liu , Mohanasankar Sivaprakasam , Gang Wang , Moo Sung Chae A neural recording system for monitoring shark behavior. [Citation Graph (0, 0)][DBLP ] Conf ] Soumyajit Mandal , S. Zhak , Rahul Sarpeshkar Circuits for an RF cochlea. [Citation Graph (0, 0)][DBLP ] Conf ] Y. Kohira , Chikaaki Kodama , Kunihiro Fujiyoshi , A. Takahashi Evaluation of 3D-packing representations for scheduling of dynamically reconfigurable systems. [Citation Graph (0, 0)][DBLP ] Conf ] H. J. Kadim , Lacina M. Coulibaly Wave propagation based analytical model for distributed on-chip RLC interconnects. [Citation Graph (0, 0)][DBLP ] Conf ] A. Nurashikin Nordin , Mona E. Zaghloul Design and implementation of a 1GHz CMOS resonator utilizing surface acoustic wave. [Citation Graph (0, 0)][DBLP ] Conf ] A. Nurrachmat , Enrico Macii , Massimo Poncino Low-energy pixel approximation for DVI-based LCD interfaces. [Citation Graph (0, 0)][DBLP ] Conf ] Stephen Warrington , Wai-Yip Chan , Subramania Sudharsanan Scalable high-throughput architecture for H.264/AVC variable block size motion estimation. [Citation Graph (0, 0)][DBLP ] Conf ] Chien-Jen Huang , Hsi-Pin Ma A WCDMA/HSDPA baseband processor. [Citation Graph (0, 0)][DBLP ] Conf ] K. Supramaniam , Yong Lian Complexity reduction for frequency-response masking filters using cyclotomic polynomial prefilters. [Citation Graph (0, 0)][DBLP ] Conf ] Chih-Wei Yao , Alan N. Willson Jr. Energy circulation quadrature LC-VCO. [Citation Graph (0, 0)][DBLP ] Conf ] Vincent Lagareste , Franck Badets , Pierre Melchior , Jean-Baptiste Begueret , Yann Deval , Alain Oustaloup , Didier Belot Phase locked loop robustness improvement using non integer order loop filter. [Citation Graph (0, 0)][DBLP ] Conf ] A. Olyaei , R. Genov Algorithmic Delta-Sigma-modulated FIR filter. [Citation Graph (0, 0)][DBLP ] Conf ] Heng-Chou Chen , Oscal T.-C. Chen Population fitness probability for effectively terminating the evolution operations of a genetic algorithm. [Citation Graph (0, 0)][DBLP ] Conf ] S. Sridharan , Sripriya R. Bandi , Clyde Washburn , Ponnathpur R. Mukund , Jan Kolnik , Ken Paradis , Steve Howard , Jeff Burleson A universal common-source and common-drain model for 1-20GHz frequency range. [Citation Graph (0, 0)][DBLP ] Conf ] Raf Schoofs , Michiel Steyaert , Willy M. C. Sansen A 7.5mW, 11-bit continuous-time sigma-delta A/D converter for WLAN applications. [Citation Graph (0, 0)][DBLP ] Conf ] Marco Grassi , Piero Malcovati , Andrea Baschirotto Wide-range integrated gas sensor interface based on a resistance-to-number converter technique with the oscillator decoupled from the input device. [Citation Graph (0, 0)][DBLP ] Conf ] Noboru Hayasaka , Yoshikazu Miyanaga Spectrum filtering with FRM for robust speech recognition. [Citation Graph (0, 0)][DBLP ] Conf ] M. A. Hasan Higher order convergent algorithms with applications to polynomials and matrices. [Citation Graph (0, 0)][DBLP ] Conf ] John G. Apostolopoulos , Susie Wee , Frédéric Dufaux , Touradj Ebrahimi , Qibin Sun , Zhishou Zhang The emerging JPEG-2000 security (JPSEC) standard. [Citation Graph (0, 0)][DBLP ] Conf ] Daofeng Xu , Luxi Yang , Zhenya He Subspace based blind channel estimation for space time block coded OFDM system. [Citation Graph (0, 0)][DBLP ] Conf ] Dongmin Park , SeongHwan Cho A power-optimized CMOS LC VCO with wide tuning range in 0.5-V supply. [Citation Graph (0, 0)][DBLP ] Conf ] Frédéric Dufaux , Giuseppe Baruffa , Fabrizio Frescura , Didier Nicholson JPWL - an extension of JPEG 2000 for wireless imaging. [Citation Graph (0, 0)][DBLP ] Conf ] Timothy G. Constandinou , Patrick Degenaar , Christofer Toumazou An adaptable foveating vision chip. [Citation Graph (0, 0)][DBLP ] Conf ] Ranjith Kumar , Volkan Kursun Impact of temperature fluctuations on circuit characteristics in 180nm and 65nm CMOS technologies. [Citation Graph (0, 0)][DBLP ] Conf ] Øivind Næss , Yngvar Berg Switched pseudo floating-gate reconfigurable linear threshold elements. [Citation Graph (0, 0)][DBLP ] Conf ] L. Hernandez , E. Prefasi , Pieter Rombouts A continuous-time band-pass Sigma Delta modulator implemented in 0.35µm BiCMOS using transmission lines. [Citation Graph (0, 0)][DBLP ] Conf ] Yoji Kajitani Theory of placement by numDAG related with single-sequence, SP, BSG, and O-tree. [Citation Graph (0, 0)][DBLP ] Conf ] Fei Yuan , Minghai Li A new area-efficient 4-PAM 10 Gb/s CMOS serial link transmitter. [Citation Graph (0, 0)][DBLP ] Conf ] Jonne Poikonen , Ari Paasio On the topographic equivalence between voltage mode and current mode ranked order filters for array processors. [Citation Graph (0, 0)][DBLP ] Conf ] Maurits Ortmanns , N. Unger , A. Rocke , M. Gehrke , H. J. Tiedtke A retina stimulator ASIC with 232 electrodes, custom ESD protection and active charge balancing. [Citation Graph (0, 0)][DBLP ] Conf ] Chen Dong , S. Haruehanroengra , Wei Wang Exploring carbon nanotubes and NiSi nanowires as on-chip interconnections. [Citation Graph (0, 0)][DBLP ] Conf ] M. Fukuhara , M. Yoshida Power consumption of a Hamming distance search CAM using neuron MOS transistors. [Citation Graph (0, 0)][DBLP ] Conf ] Tsung-Yu Yang , Hsin-Lung Tu , Hwann-Kaeo Chiou Low-voltage high-linear and isolation transformer based mixer for direct conversion receiver. [Citation Graph (0, 0)][DBLP ] Conf ] Jun Ma , Alexander Vardy , Zhongfeng Wang Reencoder design for soft-decision decoding of an (255, 239) Reed-Solomon code. [Citation Graph (0, 0)][DBLP ] Conf ] Pavel Petkov , Jim Conder , Friedel Gerfers An infinite-skew tolerant delay locked loop. [Citation Graph (0, 0)][DBLP ] Conf ] Christoph Saas , T. Schwarzenbeck , Josef A. Nossek Low power reference voltages for stepwise display drivers. [Citation Graph (0, 0)][DBLP ] Conf ] K. S. Sainarayanan , J. V. R. Ravindra , M. B. Srinivas A novel, coupling driven, low power bus coding technique for minimizing capacitive crosstalk in VLSI interconnects. [Citation Graph (0, 0)][DBLP ] Conf ] Yingxue Wang , Shih-Chii Liu Programmable synaptic weights for an aVLSI network of spiking neurons. [Citation Graph (0, 0)][DBLP ] Conf ] Haruna Matsushita , Yoshifumi Nishio Competing and accommodating behaviors of peace SOM. [Citation Graph (0, 0)][DBLP ] Conf ] J. Sydor Messaging and spectrum sharing between ad-hoc cognitive radio networks. [Citation Graph (0, 0)][DBLP ] Conf ] Zhenyu Wu , Jill M. Boyce An error concealment scheme for entire frame losses based on H.264/AVC. [Citation Graph (0, 0)][DBLP ] Conf ] Jong-Suk Lee , Dong Sam Ha FleXilicon: a reconfigurable architecture for multimedia and wireless communications. [Citation Graph (0, 0)][DBLP ] Conf ] Y. Tanji , H. Asai , M. Oda , Y. Nishio , A. Ushida Fast timing analysis of plane circuits via two-layer CNN-based modeling. [Citation Graph (0, 0)][DBLP ] Conf ] T. Bourdi , A. Borjak , Izzet Kale A modeling platform for efficient characterization of phase-locked loop Delta Sigma frequency synthesizers. [Citation Graph (0, 0)][DBLP ] Conf ] Yibo Fan , Xiaoyang Zeng , Yu Yu , Gang Wang , Qianling Zhang A modified high-radix scalable Montgomery multiplier. [Citation Graph (0, 0)][DBLP ] Conf ] Fabio Campi , P. Zoffoli , Claudio Mucci , Massimo Bocchi , Antonio Deledda , M. De Dominicis , Arseni Vitkovski A stream register file unit for reconfigurable processors. [Citation Graph (0, 0)][DBLP ] Conf ] Riaz Naseer , Jeff Draper DF-DICE: a scalable solution for soft error tolerant circuit design. [Citation Graph (0, 0)][DBLP ] Conf ] Abhishek Somani , P. P. Chakrabarti , Amit Patra A model-based hybrid evolutionary algorithm for fast yield-inclusive design space exploration of analog circuits. [Citation Graph (0, 0)][DBLP ] Conf ] Wu-Hua Chen , Wei Xing Zheng Stability analysis for Cohen-Grossberg neural networks with time-varying delays. [Citation Graph (0, 0)][DBLP ] Conf ] Josep Altet , D. Mateo , J. L. González , E. Aldrete-Vidrio Observation of high-frequency analog/RF electrical circuit characteristics by on-chip thermal measurements. [Citation Graph (0, 0)][DBLP ] Conf ] D. Barrettino Design considerations and recent advances in CMOS-based microsystems for point-of-care clinical diagnostics. [Citation Graph (0, 0)][DBLP ] Conf ] Munkyo Seo , Mark J. W. Rodwell , Upamanyu Madhow Blind correction of gain and timing mismatches for a two-channel time-interleaved analog-to-digital converter: experimental verification. [Citation Graph (0, 0)][DBLP ] Conf ] Kenneth A. Townsend , James W. Haslett Low-power Q-enhancement for parallel LC tanks. [Citation Graph (0, 0)][DBLP ] Conf ] H. J. Kadim , Lacina M. Coulibaly EM-based analytical model for estimation of worst-case crosstalk noise. [Citation Graph (0, 0)][DBLP ] Conf ] M. G. J. Lind , G. A. Dumont , W. G. Dunford Analysis of a circuit exhibiting ferroresonance. [Citation Graph (0, 0)][DBLP ] Conf ] Sani R. Nassif , Kanak Agarwal , Emrah Acar Methods for estimating decoupling capacitance of nonswitching circuit blocks. [Citation Graph (0, 0)][DBLP ] Conf ] W. Y. Lau , S. C. Chan , Z. G. Zhang , C. H. Leung A new QR-decomposition based recursive frequency estimator for multiple sinusoids in impulsive noise environment. [Citation Graph (0, 0)][DBLP ] Conf ] Zhenyu Liu , Tughrul Arslan , Ahmet T. Erdogan An embedded low power reconfigurable fabric for finite state machine operations. [Citation Graph (0, 0)][DBLP ] Conf ] Yu-Cheng Lin , Pei-Lun Li , Chin-Hsiang Chang , Chi-Ling Wu , You-Ming Tsao , Shao-Yi Chien Multi-pass algorithm of motion estimation in video encoding for generic GPU. [Citation Graph (0, 0)][DBLP ] Conf ] Tokunbo Ogunfunmi , Hamadi Jamali Performance bounds on the constant modulus error surface. [Citation Graph (0, 0)][DBLP ] Conf ] Kenneth B. Kent , Jacqueline E. Rice A systolic array technique for determining common approximate substrings. [Citation Graph (0, 0)][DBLP ] Conf ] Fabian J. Theis , Yujiro Inouye On the use of joint diagonalization in blind signal processing. [Citation Graph (0, 0)][DBLP ] Conf ] M. A. Hasan Differential and geometric properties of Rayleigh quotients with applications. [Citation Graph (0, 0)][DBLP ] Conf ] Jiefeng Yan , Lei Xie , Xiaoyang Zeng , Tingao Tang Adaptive bandwidth PLL with compact current mode filter. [Citation Graph (0, 0)][DBLP ] Conf ] Dongkyu Park , Byunghoo Jung Low power LC-VCO design using direct cross-coupled cell biasing. [Citation Graph (0, 0)][DBLP ] Conf ] Rajeev C. Nongpiur , Dale J. Shpak , Andreas Antoniou Average power sum of the near-end crosstalk couplings after near-end crosstalk cancellation. [Citation Graph (0, 0)][DBLP ] Conf ] A. Ismail , Mohamed I. Elmasry A termination technique for the averaging network of flash ADC's. [Citation Graph (0, 0)][DBLP ] Conf ] Leu-Shing Lan M-SVC (mixed-norm SVC) - a novel form of support vector classifier. [Citation Graph (0, 0)][DBLP ] Conf ] Seogheon Ham , Yonghee Lee , Wunki Jung , Seunghyun Lim , Kwisung Yoo , Youngcheol Chae , Jihyun Cho , Dongmyung Lee , Gunhee Han CMOS image sensor with analog gamma correction using nonlinear single-slope ADC. [Citation Graph (0, 0)][DBLP ] Conf ] R. Shaik , R. Ordonez , R. P. Ramachandran Nonylphenol biodegradation kinetics estimation using neural networks. [Citation Graph (0, 0)][DBLP ] Conf ] Edward Choi , Yingkai Liu , Elisabeth Smela , Andreas G. Andreou System for deposition and characterization of polypyrrole/gold bilayer hinges. [Citation Graph (0, 0)][DBLP ] Conf ] Chi-Fang Li , R. J.-H. Cheng A two-stage digital AGC scheme with diversity selection for frame-based OFDM systems. [Citation Graph (0, 0)][DBLP ] Conf ] Paul Merolla , Kwabena Boahen Dynamic computation in a recurrent network of heterogeneous silicon neurons. [Citation Graph (0, 0)][DBLP ] Conf ] Timothy K. Horiuchi A neural model for sonar-based navigation in obstacle fields. [Citation Graph (0, 0)][DBLP ] Conf ] He-Yuan Lin , Gwo Giun Lee , Ming-Jiun Wang , Drew Wei-Chi Su , Bo-Yun Lin Model-based optimal rate control algorithm for real-time hybrid video encoder. [Citation Graph (0, 0)][DBLP ] Conf ] Seunghyun Cho , Chang-Hyo Yu , Lee-Sup Kim An efficient texture cache for programmable vertex shaders. [Citation Graph (0, 0)][DBLP ] Conf ] C. Vogel , H. Johansson Time-interleaved analog-to-digital converters: status and future directions. [Citation Graph (0, 0)][DBLP ] Conf ] Manho Kim , Daewook Kim , Gerald E. Sobelman Network-on-chip link analysis under power and performance constraints. [Citation Graph (0, 0)][DBLP ] Conf ] Ethan Farquhar , Christal Gordon , Paul E. Hasler A field programmable neural array. [Citation Graph (0, 0)][DBLP ] Conf ] Sarp Ertürk , Tae Gyu Chang Wavelet domain one-bit transform for low-complexity motion estimation. [Citation Graph (0, 0)][DBLP ] Conf ] Yi-Lun Lin , Shu-Fa Lin , H. H. Chen , Yuh-Feng Hsu Improving the coding of regions of interest. [Citation Graph (0, 0)][DBLP ] Conf ] Mitsuru Kawamoto , Kiyotaka Kohno , Yujiro Inouye Eigenvector algorithms using reference signals for blind source separation of instantaneous mixtures. [Citation Graph (0, 0)][DBLP ] Conf ] Luonan Chen , Ruiqi Wang , Xiabo Zhou , S. Wong Designing synthetic biological networks. [Citation Graph (0, 0)][DBLP ] Conf ] Athanassios N. Skodras , Touradj Ebrahimi JPEG2000 image coding system theory and applications. [Citation Graph (0, 0)][DBLP ] Conf ] Ahmed Allam , Igor M. Filanovsky , Luís Bica Oliveira , Jorge R. Fernandes Synchronization of mutually coupled LC-oscillators. [Citation Graph (0, 0)][DBLP ] Conf ] Michalis D. Galanis , Grigoris Dimitroulakos , Constantinos E. Goutis Mapping DSP applications on processor/coarse-grain reconfigurable array architectures. [Citation Graph (0, 0)][DBLP ] Conf ] S. Tontisirin , R. Tielert A Gb/s one-fourth-rate CMOS CDR circuit without external reference clock. [Citation Graph (0, 0)][DBLP ] Conf ] Chang-Ching Wu , A. Yen , Jen-Chung Chang A 0.13µm CMOS T/R switch design for ultrawideband wireless applications. [Citation Graph (0, 0)][DBLP ] Conf ] Fabio Frustaci , Pasquale Corsonello , Stefania Perri , Giuseppe Cocorullo Leakage energy reduction techniques in deep submicron cache memories: a comparative study. [Citation Graph (0, 0)][DBLP ] Conf ] Yong Shim , Youngkwon Jo , Soo Hwan Kim , Suki Kim , Kwanjun Cho A register controlled delay locked loop using a TDC and a new fine delay line scheme. [Citation Graph (0, 0)][DBLP ] Conf ] Christian Falconi , E. Zampetti , S. Pantalei , E. Martinelli , C. DiNatale , Arnaldo D'Amico , V. Stornelli , G. Ferri Temperature and flow velocity control for quartz crystal microbalances. [Citation Graph (0, 0)][DBLP ] Conf ] Peter Schelkens , Adrian Munteanu , Alexis Tzannes , Christopher M. Brislawn JPEG2000. Part 10. Volumetric data encoding. [Citation Graph (0, 0)][DBLP ] Conf ] Ho-Yin Lee , Chen-Ming Hsu , Ching-Hsing Luo CMOS thermal sensing system with simplified circuits and high accuracy for biomedical application. [Citation Graph (0, 0)][DBLP ] Conf ] Gonggui Xu , Shouli Yan An improved frequency and phase synthesis architecture. [Citation Graph (0, 0)][DBLP ] Conf ] Giuseppe de Vita , Giuseppe Iannaccone Ultra-low-power flash memory in standard 0.35µm CMOS for passive microwave RFID transponders. [Citation Graph (0, 0)][DBLP ] Conf ] Antonio Cantoni , Jacqueline Walker Characterization of a metastability measurement system. [Citation Graph (0, 0)][DBLP ] Conf ] A. Ohta , K. Kato , K. Tsuji Structural analysis of Petri nets with batch processing arcs. [Citation Graph (0, 0)][DBLP ] Conf ] Chien-Cheng Tseng Design of half sample delay IIR filter using continued fraction expansion. [Citation Graph (0, 0)][DBLP ] Conf ] Shuangching Chen , Shugang Wei Weighted-to-residue and residue-to-weighted converters with three-moduli (2n -1, 2n , 2n +1) signed-digit architectures. [Citation Graph (0, 0)][DBLP ] Conf ] Mostafa Savadi Oskooei , N. Masoumi Modeling the effect of distortion on the phase noise in electrical oscillators. [Citation Graph (0, 0)][DBLP ] Conf ] Chung-Yi Li , Jiung-Sheng Chen , Tsin-Yuan Chang A chaos-based pseudo random number generator using timing-based reseeding method. [Citation Graph (0, 0)][DBLP ] Conf ] Pawel Garstecki , Adam Luczak , Marta Stepniewska A bit-serial implementation of mode decision algorithm for AVC encoders. [Citation Graph (0, 0)][DBLP ] Conf ] Ya-Ti Peng , Ching-Yung Lin , Ming-Ting Sun , Ming-Whei Feng Sleep condition inferencing using simple multimodality sensors. [Citation Graph (0, 0)][DBLP ] Conf ] Massimo Alioto , Gaetano Palumbo Nanometer MCML gates: models and design considerations. [Citation Graph (0, 0)][DBLP ] Conf ] Yu Liu , King Ngi Ngan Fast lossless multi-resolution motion estimation for scalable wavelet video coding. [Citation Graph (0, 0)][DBLP ] Conf ] P. Silva , Kofi A. A. Makinwa , Johan H. Huijsing , L. Breems Noise analysis of continuous-time Sigma Delta modulators with switched-capacitor feedback DAC. [Citation Graph (0, 0)][DBLP ] Conf ] R. M. Mutelo , Li Chin Khor , Wai Lok Woo , Satnam Singh Dlay A novel Fisher discriminant for biometrics recognition: 2DPCA plus 2DFLD. [Citation Graph (0, 0)][DBLP ] Conf ] Wei-Zen Chen , Guan-Sheng Huang A low power programmable PRBS generator and a clock multiplier unit for 10 Gbps serdes applications. [Citation Graph (0, 0)][DBLP ] Conf ] Siu-Kei Tang , Kong-Pang Pun , Oliver Chiu-sing Choy , Cheong-fat Chan A fully differential low noise amplifier with real-time channel hopping for ultra-wideband wireless applications. [Citation Graph (0, 0)][DBLP ] Conf ] Shu-Chang Kuo , Tzu-Chien Hung , Wei-Bin Yang The new improved pseudo fractional-N clock generator with 50% duty cycle. [Citation Graph (0, 0)][DBLP ] Conf ] Hossein Asadi , Mehdi Baradaran Tahoori Soft error hardening for logic-level designs. [Citation Graph (0, 0)][DBLP ] Conf ] Chun-Ming Chang Analytical synthesis of the digitally programmable voltage-mode OTA-C universal biquad. [Citation Graph (0, 0)][DBLP ] Conf ] Jhing-Fa Wang , Jia-Ching Wang , Jang-Ting Chen , An-Chao Tsai , Anand Paul A novel fast algorithm for intra mode decision in H.264/AVC encoders. [Citation Graph (0, 0)][DBLP ] Conf ] Jaehyun Baek , Myung Hoon Sunwoo Enhanced degree computationless modified Euclid's algorithm for Reed-Solomon decoder. [Citation Graph (0, 0)][DBLP ] Conf ] Farah Laiwalla , K. G. Klemic , Fred J. Sigworth , Eugenio Culurciello An integrated patch-clamp amplifier in silicon-on-sapphire CMOS. [Citation Graph (0, 0)][DBLP ] Conf ] Shu-Hui Tu , J. Neil Ross , Chun-Ming Chang Analytical synthesis of current-mode even-Nth-order single-ended-input OTA and equal-capacitor elliptic filter structure with the minimum components. [Citation Graph (0, 0)][DBLP ] Conf ] Shahab Salehi , B. M. Handjojo , Wei Wang , Yaobin Chen An efficient adaptive interlace-to-progressive scan conversion scheme and hardware implementation. [Citation Graph (0, 0)][DBLP ] Conf ] S. Itoh , S. Kawahito , S. Terakawa A 2.6mW 2fps QVGA CMOS one-chip wireless camera with digital image transmission function for capsule endoscopes. [Citation Graph (0, 0)][DBLP ] Conf ] Yijun Zhou , M. Chia Yan Wah A wide band CMOS RF power detector. [Citation Graph (0, 0)][DBLP ] Conf ] Andrea Baschirotto , Fausto Borghetti , Enrico Dallago , Piero Malcovati , M. Marchesi , G. Venchi A CMOS front-end circuit for integrated fluxgate magnetic sensors. [Citation Graph (0, 0)][DBLP ] Conf ] Maciej Borkowski , Juha Kostamovaara On randomization of digital delta-sigma modulators with DC inputs. [Citation Graph (0, 0)][DBLP ] Conf ] Man-Yau Chiu , Wan-Chi Siu New results on exhaustive search algorithm for motion estimation using adaptive partial distortion search and successive elimination algorithm. [Citation Graph (0, 0)][DBLP ] Conf ] Jun Ohta , Takahashi Tokuda , Keiichiro Kagawa , Akihiro Uehara , Yasuo Terasawa , K. Shodo , Takashi Fujikado , Yasuo Tano Toward 1000-ch electrode array based on distributed microchip architecture for retinal prosthesis. [Citation Graph (0, 0)][DBLP ] Conf ] Hong-An Huang , Yen-Chin Liao , Hsie-Chia Chang A self-compensation fixed-width booth multiplier and its 128-point FFT applications. [Citation Graph (0, 0)][DBLP ] Conf ] A. S. Seyedi , S. H. Rasouli , A. Amirabadi , Ali Afzali-Kusha Low power low leakage clock gated static pulsed flip-flop. [Citation Graph (0, 0)][DBLP ] Conf ] S. B. Prakash , Pamela Abshire , M. Urdaneta , M. Christophersen , Elisabeth Smela A CMOS potentiostat for control of integrated MEMS actuators. [Citation Graph (0, 0)][DBLP ] Conf ] Bertram Emil Shi , Eric K. S. Tsang , Stanley Y. M. Lam , Yicong Meng Expandable hardware for computing cortical feature maps. [Citation Graph (0, 0)][DBLP ] Conf ] Kuan Zhou , Yifei Luo , Sizhong Chen , A. Drake , John F. McDonald , Tong Zhang Triple-rail MOS current mode logic for high-speed self-timed pipeline applications. [Citation Graph (0, 0)][DBLP ] Conf ] Essam Atalla , Emad Hegazi , H. Sjoland , M. Marzouk Ibrahim An all-digital Sigma-Delta-frequency discriminator of arbitrary order. [Citation Graph (0, 0)][DBLP ] Conf ] A. Lopich , P. Dudek Architecture of a VLSI cellular processor array for synchronous/asynchronous image processing. [Citation Graph (0, 0)][DBLP ] Conf ] Tetsuo Nishi , Masato Ogata Analysis of DC-DC converters containing a transformer. [Citation Graph (0, 0)][DBLP ] Conf ] Hui Zhao , H. K. Kwan , Jubang Yu Fractional discrete-time chaotic map. [Citation Graph (0, 0)][DBLP ] Conf ] Fred Tzeng , Payam Heydari A novel millimeter-wave multi-order LC oscillator. [Citation Graph (0, 0)][DBLP ] Conf ] Ahmed El Oualkadi , D. Cordeau , Jean-Marie Paillot High-Q CMOS LC pseudo switched-capacitor bandpass filter with center frequency tuning. [Citation Graph (0, 0)][DBLP ] Conf ] P. Silva , Kofi A. A. Makinwa , Johan H. Huijsing , L. Breems A 110dB dynamic range continuous-time IF-to-baseband Sigma Delta modulator for AM/FM/IBOC receivers. [Citation Graph (0, 0)][DBLP ] Conf ] Miao Li , Wenjie Huang , Tad A. Kwasniewski , Shoujun Wang A 0.18µm CMOS clock and data recovery circuit with extended operation range. [Citation Graph (0, 0)][DBLP ] Conf ] Nan Li , Behrouz Nowrouzian Application of frequency-response masking technique to the design of a novel modified-DFT filter bank. [Citation Graph (0, 0)][DBLP ] Conf ] H. S. Savci , Z. Wang , A. Sula , Numan Sadi Dogan , Ercument Arvas A 1-V UHF low noise amplifier for ultralow-power applications. [Citation Graph (0, 0)][DBLP ] Conf ] R. Jacob Vogelstein , Ralph Etienne-Cummings , Nitish V. Thakor , Avis H. Cohen Dynamic control of spinal locomotion circuits. [Citation Graph (0, 0)][DBLP ] Conf ] Chao-Yuan Hsu , Wen-Rong Wu A low-complexity ICI mitigation method for high-speed mobile OFDM systems. [Citation Graph (0, 0)][DBLP ] Conf ] Songtao Huang , Maher A. Sid-Ahmed , Majid Ahmadi , Idris El-Feghi A binarization method for scanned documents based on hidden Markov model. [Citation Graph (0, 0)][DBLP ] Conf ] Gernot Hueber , Linus Maurer , Georg Strasser , Rainer Stuhlberger , Karim Chabrak , Richard Hagelauer The design of a multi-mode/multi-system capable software radio receiver. [Citation Graph (0, 0)][DBLP ] Conf ] Y. Ito , T. Sato , Noritaka Yamashita , Jianming Lu , Hiroo Sekiya , Takashi Yahagi Impulse noise detector using mathematical morphology. [Citation Graph (0, 0)][DBLP ] Conf ] Teijo Lehtonen , P. Rantala , P. Isomaki , Juha Plosila , Jouni Isoaho An approach for analysing and improving fault tolerance in radio architectures. [Citation Graph (0, 0)][DBLP ] Conf ] Ralf Salomon , Hagen Burchardt , T. Schulz Using self-organizing maps to control physical robots with omnidirectional drives. [Citation Graph (0, 0)][DBLP ] Conf ] Jinn-Shyan Wang , Yi-Ming Wang , Chun-Yuan Cheng , Yu-Chai Liu An improved SAR controller for DLL applications. [Citation Graph (0, 0)][DBLP ] Conf ] Takafumi Yamaji , Tetsuro Itakura , R. Ito , Takeshi Ueno , H. Okuni Balanced 3-phase analog signal processing for radio communications. [Citation Graph (0, 0)][DBLP ] Conf ] Susu Yao , Weisi Lin , Ee Ping Ong , Zhongkang Lu Recovery of compressed videos using forward and backward anisotropic diffusion. [Citation Graph (0, 0)][DBLP ] Conf ] Jin-Fu Lin , Soon-Jyh Chang A high speed pipelined analog-to-digital converter using modified time-shifted correlated double sampling technique. [Citation Graph (0, 0)][DBLP ] Conf ] T. Maneechukate , Jeerasuda Koseeyaporn , Paramote Wardkein , Poolsak Koseeyaporn Amplitude modulation based on time-varying forced function of second-order oscillator circuit. [Citation Graph (0, 0)][DBLP ] Conf ] I. Pappas , L. Nalpantidis , V. Kalenteridis , S. Siskos , A. A. Hatzopoulos , C. A. Dimitriadis A threshold voltage variation cancellation technique for analogue peripheral circuits of a display array using poly-Si TFTs. [Citation Graph (0, 0)][DBLP ] Conf ] Bartlomiej Puchalski , Lukasz Zielinski , Jerzy Rutkowski Use of granular method to design centering. [Citation Graph (0, 0)][DBLP ] Conf ] Christopher S. Taillefer , Gordon W. Roberts Process-insensitive modulated-clock voltage comparator. [Citation Graph (0, 0)][DBLP ] Conf ] Hao Zhong , Tong Zhang , Erich F. Haratsch High-rate quasi-cyclic LDPC codes for magnetic recording channel with low error floor. [Citation Graph (0, 0)][DBLP ] Conf ] Ju-Pyo Hong , Kyung-Soo Ha , Lee-Sup Kim A 0.18µm CMOS 10Gb/s 1: 4 DEMUX using replica-bias circuits for optical receiver. [Citation Graph (0, 0)][DBLP ] Conf ] R. Mahesh , A. Prasad Vinod A new common subexpression elimination algorithm for implementing low complexity FIR filters in software defined radio receivers. [Citation Graph (0, 0)][DBLP ] Conf ] Z. Huang , Yvon Savaria , Mohamad Sawan , R. Meinga High-voltage operational amplifier based on dual floating-gate transistors. [Citation Graph (0, 0)][DBLP ] Conf ] Honghao Ji , David Sander , A. Haas , Pamela Abshire A CMOS contact imager for locating individual cells. [Citation Graph (0, 0)][DBLP ] Conf ] Zhiping Lin , M. S. Boudellioua , Li Xu On the equivalence and factorization of multivariate polynomial matrices. [Citation Graph (0, 0)][DBLP ] Conf ] Ro-Min Weng , Chi-Cheng Chao A 1.5 V high folding rate current-mode folding amplifier for folding and interpolating ADC. [Citation Graph (0, 0)][DBLP ] Conf ] Sylvain Saïghi , Yannick Bornat , Jean Tomas , Sylvie Renaud Neuromimetic ICs and system for parameters extraction in biological neuron models. [Citation Graph (0, 0)][DBLP ] Conf ] P. D. Papadimitriou Practical review of advanced CDMA receivers with emphasis in the downlink. [Citation Graph (0, 0)][DBLP ] Conf ] Ling-Sheng Jang , Hao-Kai Keng , Yi-Chu Hsu , Deirdre R. Meldrum Development of protein chips based on self-assembled monolayer and protein A. [Citation Graph (0, 0)][DBLP ] Conf ] Jui-Ping Lien , Po-An Chen , Tzi-Dar Chiueh Design of a MIMO OFDM baseband transceiver for cognitive radio system. [Citation Graph (0, 0)][DBLP ] Conf ] Zhipeng Ye , Tao Xu , M. P. Kennedy Locking range analysis for injection-locked frequency dividers. [Citation Graph (0, 0)][DBLP ] Conf ] Matti Paavola , Mika Laiho , Mikko Saukoski , Kari Halonen A 3µW, 2 MHz CMOS frequency reference for capacitive sensor applications. [Citation Graph (0, 0)][DBLP ] Conf ] Jaime Ramírez-Angulo , S. Gupta , Ramón González Carvajal , Antonio J. López-Martín New improved CMOS class AB buffers based on differential flipped voltage followers. [Citation Graph (0, 0)][DBLP ] Conf ] J. H. Wittig Jr. , Kwabena Boahen Silicon neurons that phase-lock. [Citation Graph (0, 0)][DBLP ] Conf ] Xia Xiao Xin , Tay Teng Tiow IPC-driven energy reduction for low-power design. [Citation Graph (0, 0)][DBLP ] Conf ] Rui Cao , Yuanjin Zheng , Yong Lian A CFAR synchronization scheme for impulse based UWB receiver. [Citation Graph (0, 0)][DBLP ] Conf ] Mahdi Shabany , P. Glenn Gulak VLSI implementation of a sequential Monte Carlo receiver. [Citation Graph (0, 0)][DBLP ] Conf ] Erhan Ozalevli , Paul E. Hasler A tunable floating gate CMOS resistor for low-power and low-voltage applications. [Citation Graph (0, 0)][DBLP ] Conf ] Ari Viholainen , Tero Ihalainen , Markku Renfors Performance of time-frequency localized and frequency selective filter banks in multicarrier systems. [Citation Graph (0, 0)][DBLP ] Conf ] D. Y. Wang , Zivan Zabar , Dariusz Czarkowski Load flow based distribution system short-circuit algorithm incorporating distributed synchronous generators. [Citation Graph (0, 0)][DBLP ] Conf ] T. Yamada , A. Koh Optimal adaptive diagnosis with spares. [Citation Graph (0, 0)][DBLP ] Conf ] Shengmei Zhao , Jia Yao , Baoyu Zheng Multiuser detection based on Grover's algorithm. [Citation Graph (0, 0)][DBLP ] Conf ] Themistoklis Prodromakis , Christos Papavassiliou Distributed filter design on silicon CMOS. [Citation Graph (0, 0)][DBLP ] Conf ] Igor Miletic , Ralph Mason Quantization noise reduction using multiphase PLLs. [Citation Graph (0, 0)][DBLP ] Conf ] Jian-Liang Lin , Wen-Liang Hwang , Soo-Chang Pei Video compression based on orthonormal matching pursuits. [Citation Graph (0, 0)][DBLP ] Conf ] Somsubhra Mondal , Rajarshi Mukherjee , Seda Ogrenci Memik Fine-grain thermal profiling and sensor insertion for FPGAs. [Citation Graph (0, 0)][DBLP ] Conf ] R. Mukhopadhyay , S. W. Yoon , Y. Park , C.-H. Lee , S. Nuttinck , Joy Laskar Investigation of inductors for digital Si-CMOS technologies. [Citation Graph (0, 0)][DBLP ] Conf ] Ranjit Gharpurey , Junghwan Han , S. Venkataraman A low-power signal-recycling mixer and baseband amplifier with current reuse. [Citation Graph (0, 0)][DBLP ] Conf ] Jun-Xia Ma , Sai-Weng Sin , Seng-Pan U. , Rui Paulo Martins A power-efficient 1.056 GS/s resolution-switchable 5-bit/6-bit flash ADC for UWB applications. [Citation Graph (0, 0)][DBLP ] Conf ] Mitchell J. Myjak , José G. Delgado-Frias Superpipelined reconfigurable hardware for DSP. [Citation Graph (0, 0)][DBLP ] Conf ] Haihua Liu , Xinhao Chen , Yaguang Chen , Changsheng Xie Double change detection method for moving-object segmentation based on clustering. [Citation Graph (0, 0)][DBLP ] Conf ] Wei-Tsen Lin , Dah-Chung Chang The extended Kalman filtering algorithm for carrier synchronization and the implementation. [Citation Graph (0, 0)][DBLP ] Conf ] Luigi Egiziano , Nicola Femia , D. Granozio , Giovanni Petrone , Giovanni Spagnuolo , Massimo Vitelli Photovoltaic inverters with Perturb&Observe MPPT technique and one-cycle control. [Citation Graph (0, 0)][DBLP ] Conf ] R. Ramzan , L. Zou , J. Dabrowski LNA design for on-chip RF test. [Citation Graph (0, 0)][DBLP ] Conf ] Jens Anders , Wolfgang Mathis Simulation techniques for noise-analysis in the PLL design process. [Citation Graph (0, 0)][DBLP ] Conf ] B. Saillet , A. Regnier , Jean Michel Portal , B. Delsuc , R. Laffont , P. Masson , R. Bouchakour MM11 based flash memory cell model including characterization procedure. [Citation Graph (0, 0)][DBLP ] Conf ] Herminio Martínez , Eva Vidal , Eduard Alarcón , Alberto Poveda Improving the stability of on-chip automatic tuning loops for continuous-time filters with an analog adaptive controller. [Citation Graph (0, 0)][DBLP ] Conf ] Trung-Kien Nguyen , Sang-Gug Lee A sub-mA, high-gain CMOS low-noise amplifier for 2.4 GHz applications. [Citation Graph (0, 0)][DBLP ] Conf ] Ravi Kumar Satzoda , Chip-Hong Chang A fast kernel for unifying GF(p) and GF(2m ) Montgomery multiplications in a scalable pipelined architecture. [Citation Graph (0, 0)][DBLP ] Conf ] Shih-Chii Liu , Matthias Oster Feature competition in a spike-based winner-take-all VLSI network. [Citation Graph (0, 0)][DBLP ] Conf ] Marcus Prochaska , K. Bohle , Wolfgang Mathis An improved design approach for LC tank VCOs. [Citation Graph (0, 0)][DBLP ] Conf ] Chien-Cheng Tseng Design of IIR integrators using Newton-Cotes quadrature rule and fractional sample delay. [Citation Graph (0, 0)][DBLP ] Conf ] Dong Liu , Wenpeng Ding , Yuwen He , Feng Wu Quality-biased rate allocation for compound image coding with block classification. [Citation Graph (0, 0)][DBLP ] Conf ] Muhammad N. Marsono , M. Watheq El-Kharashi , Fayez Gebali Binary LNS-based naive Bayes hardware classifier for spam control. [Citation Graph (0, 0)][DBLP ] Conf ] Mahdi Shabany , P. Glenn Gulak An efficient architecture for distributed resampling for high-speed particle filtering. [Citation Graph (0, 0)][DBLP ] Conf ] Ming-Der Shieh , Tai-Ping Wang , Chien-Ming Wu , Chun-Ming Huang Efficient path metric access for reducing interconnect overhead in Viterbi decoders. [Citation Graph (0, 0)][DBLP ] Conf ] Yu Lin , R. Geiger Unit resistor characterization for matching-critical circuit design. [Citation Graph (0, 0)][DBLP ] Conf ] Vladimir V. Lukin , A. Totsky , D. Fevralev , A. Roenko , Jaakko Astola , Karen O. Egiazarian Adaptive combined bispectrum-filtering signal processing in radar systems with low SNR. [Citation Graph (0, 0)][DBLP ] Conf ] Daewook Kim , Manho Kim , Gerald E. Sobelman NIUGAP: low latency network interface architecture with Gray code for networks-on-chip. [Citation Graph (0, 0)][DBLP ] Conf ] U. Yodprasit , Christian C. Enz On an implementation of differential and quadrature Colpitts injection-locked frequency dividers. [Citation Graph (0, 0)][DBLP ] Conf ] Mark P. Tennant , Ahmet T. Erdogan , Tughrul Arslan , John S. Thompson A novel equaliser architecture with dynamic length optimisation. [Citation Graph (0, 0)][DBLP ] Conf ] A. Teplinsky , R. Flynn , O. Feely Limit cycles in bang-bang phase-locked loops. [Citation Graph (0, 0)][DBLP ] Conf ] N. Sadeghi , S. Howard , Soraya Kasnavi , Kris Iniewski , Vincent C. Gaudet , Christian Schlegel Analysis of error control code use in ultra-low-power wireless sensor networks. [Citation Graph (0, 0)][DBLP ] Conf ] Kostas Siozios , Dimitrios Soudris , Adonios Thanailakis A novel methodology for designing high-performance and low-power FPGA interconnection targeting DSP applications. [Citation Graph (0, 0)][DBLP ] Conf ] U. Yodprasit , Christian C. Enz Realization of a low-voltage and low-power Colpitts quadrature oscillator. [Citation Graph (0, 0)][DBLP ] Conf ] Rastislav Lukac , Konstantinos N. Plataniotis , Bogdan Smolka On cDNA microarray spot localization. [Citation Graph (0, 0)][DBLP ] Conf ] T. Song , S. Yan A low power 1.1 MHz CMOS continuous-time delta-sigma modulator with active-passive loop filters. [Citation Graph (0, 0)][DBLP ] Conf ] Kiyotaka Kohno , Yujiro Inouye , Mitsuru Kawamoto Robust super-exponential methods for blind deconvolution of MIMO-IIR systems with Gaussian noise. [Citation Graph (0, 0)][DBLP ] Conf ] Ke Liu , Wen-min Lin , Jia-ning Su , Hao Min Low-complexity synchronization technique with adaptive mode detection for DVB-H system. [Citation Graph (0, 0)][DBLP ] Conf ] S. Shimada , S. Taoka , M. Yamauchi , T. Watanabe An improved heuristic algorithm FEIDEQ for the maximum legal firing sequence problem of Petri nets. [Citation Graph (0, 0)][DBLP ] Conf ] Huifeng Shen , Xiaoyan Sun , Feng Wu , Shipeng Li Rate-distortion optimization for fast hierarchical B-picture transcoding. [Citation Graph (0, 0)][DBLP ] Conf ] Sükrü Eser Oner , Muhammet Koksal , Mehmet Sagbas Electronically controllable biquads using single CDBA. [Citation Graph (0, 0)][DBLP ] Conf ] B. Tavassoli , Omid Shoaei Digital background calibration of pipeline ADC with open-loop gain stage. [Citation Graph (0, 0)][DBLP ] Conf ] Dimitrios N. Loizos , Paul-Peter Sotiriadis , Gert Cauwenberghs A robust continuous-time multi-dithering technique for laser communications using adaptive optics. [Citation Graph (0, 0)][DBLP ] Conf ] Xuan Jing , Lap-Pui Chau A novel intra-rate estimation method for H.264 rate control. [Citation Graph (0, 0)][DBLP ] Conf ] Yen-Ting Liu , Lih-Yih Chiou , Soon-Jyh Chang Energy-efficient adaptive clocking dual edge sense-amplifier flip-flop. [Citation Graph (0, 0)][DBLP ] Conf ] K. Kiyoyama , Yoshinobu Tanaka , Michihisa Onoda A low current consumption delta-sigma modulator for body-implanted chip. [Citation Graph (0, 0)][DBLP ] Conf ] Wei Liu , Danilo P. Mandic , Andrzej Cichocki An analysis of the CCA approach for blind source separation and its adaptive realization. [Citation Graph (0, 0)][DBLP ] Conf ] I. J. Umoh , Tokunbo Ogunfunmi Lower bounds for the MSE convergence of APA. [Citation Graph (0, 0)][DBLP ] Conf ] Z. Wang , H. S. Savci , Numan Sadi Dogan 1-V ultra-low-power CMOS LC VCO for UHF quadrature signal generation. [Citation Graph (0, 0)][DBLP ] Conf ] Le Wang , Parag Upadhyaya , Pinping Sun , Yang Zhang , Deuk Hyoun Heo , Yi-Jan Emery Chen , DongHo Jeong A 5.3GHz low-phase-noise LC VCO with harmonic filtering resistor. [Citation Graph (0, 0)][DBLP ] Conf ] Stephen Bates , L. Gunthorpe , Ali Emre Pusane , Zhengang Chen , Kamil Sh. Zigangirov , Daniel J. Costello Jr. Decoders for low-density parity-check convolutional codes with large memory. [Citation Graph (0, 0)][DBLP ] Conf ] Kai M. Hynna , Kwabena Boahen Neuronal ion-channel dynamics in silicon. [Citation Graph (0, 0)][DBLP ] Conf ] R. C. de Lamare , Paulo S. R. Diniz Set-membership adaptive algorithms based on time-varying error bounds for DS-CDMA systems. [Citation Graph (0, 0)][DBLP ] Conf ] M. D. Linderman , T. H. Meng A low power merge cell processor for real-time spike sorting in implantable neural prostheses. [Citation Graph (0, 0)][DBLP ] Conf ] Ting-Zhen Wei , Shyh-Jye Jou , Muh-Tian Shiue Memory reduction ICFO estimation architecture for DVB-T. [Citation Graph (0, 0)][DBLP ] Conf ] Guo-Shiuan Yu , Tian-Sheuan Chang A zero-skipping multi-symbol CAVLC decoder for MPEG-4 AVC/H.264. [Citation Graph (0, 0)][DBLP ] Conf ] Behrouz Nowrouzian , J. Pulido-Salcedo , P. S. Wang A two-stage genetic algorithm for the design and optimization of resonator/integrator based sigma-delta A/D and D/A converters. [Citation Graph (0, 0)][DBLP ] Conf ] Josep Soler Garrido , Robert J. Piechocki , K. Maharatna , D. McNamara MIMO detection in analog VLSI. [Citation Graph (0, 0)][DBLP ] Conf ] Y. J. Kou , W.-S. Lu , A. Antoniou Peak-to-average power-ratio reduction for OFDM systems based on method of conditional probability and coordinate descent optimization. [Citation Graph (0, 0)][DBLP ] Conf ] Saeed Saeedi , Saeid Mehrmanesh , Armin Tajalli , Seyed Mojtaba Atarodi A technique to suppress tail current flicker noise in CMOS LC VCOs. [Citation Graph (0, 0)][DBLP ] Conf ] Wei Xing Zheng A new look at parameter estimation of autoregressive signals from noisy observations. [Citation Graph (0, 0)][DBLP ] Conf ] Yoshifumi Tada , Yoko Uwate , Yoshifumi Nishio Performance of chaotic switching noise injected to Hopfield NN for quadratic assignment problem. [Citation Graph (0, 0)][DBLP ] Conf ] Tao Wang , Fei Yuan A new current-mode incremental signaling scheme with applications to Gb/s parallel links. [Citation Graph (0, 0)][DBLP ] Conf ] Yuehui Huang , C. K. Tse On the basins of attraction of parallel connected buck switching converters. [Citation Graph (0, 0)][DBLP ] Conf ] G. Vitzilaios , Yannis Papananos , G. Theodoratos , A. Vasilopoulos A low-voltage CMOS LNA with multiple magnetic feedback for WLAN applications. [Citation Graph (0, 0)][DBLP ] Conf ] M. Kemal Güllü , Oguzhan Urhan , Sarp Ertürk Scratch detection via temporal coherency analysis and removal using edge priority based interpolation. [Citation Graph (0, 0)][DBLP ] Conf ] Youngsik Hur , J. Park , W. Woo , K. Lim , C.-H. Lee , Hyoungsoo Kim , Joy Laskar A wideband analog multi-resolution spectrum sensing (MRSS) technique for cognitive radio (CR) systems. [Citation Graph (0, 0)][DBLP ] Conf ] Olli Lahdenoja , Janne Maunu , Mika Laiho , Ari Paasio A massively parallel algorithm for local binary pattern based face recognition. [Citation Graph (0, 0)][DBLP ] Conf ] Lessing Luu , Babak Daneshrad Relaxing RF component requirements in a Weaver architecture by learning and adapting to the environment. [Citation Graph (0, 0)][DBLP ] Conf ] Meng-Ting Tsai , Ching-Yuan Yang A frequency synthesizer realized by a transformer-based voltage-controlled oscillator for IEEE 802.11a/b/g channels. [Citation Graph (0, 0)][DBLP ] Conf ] G. Molnar , M. Vucic Design of IIR all-pass equalizers based on minimum of waveform distortion. [Citation Graph (0, 0)][DBLP ] Conf ] Yuichiro Orino , Minoru Kuribayashi Kurosawa , Takashi Katagiri Phase-tracking loop based on delta-sigma oversampling architecture. [Citation Graph (0, 0)][DBLP ] Conf ] S. Shekhar , Sankaran Aniruddhan , David J. Allstot A fully-differential CMOS Clapp VCO for IEEE 802.11a applications. [Citation Graph (0, 0)][DBLP ] Conf ] Yejun He , Guangxi Zhu On the performance of TPC-based STBC coded MIMO-OFDM system over IMT2000 channels. [Citation Graph (0, 0)][DBLP ] Conf ] H. Adrang , Reza Lotfi , K. Mafinejhad , Armin Tajalli , Saeid Mehrmanesh A low-power CMOS Gm-C filter for wireless receiver applications with on-chip automatic tuning system. [Citation Graph (0, 0)][DBLP ] Conf ] Shunsuke Akiyama , Takao Waho A 6-bit low-power compact flash ADC using current-mode threshold logic gates. [Citation Graph (0, 0)][DBLP ] Conf ] Jon Alfredsson , Bengt Oelmann Capacitance selection for digital floating-gate circuits operating in subthreshold. [Citation Graph (0, 0)][DBLP ] Conf ] Itisha Chanodia , Dimitrios Velenis Effects of crosstalk noise on H-tree clock distribution networks. [Citation Graph (0, 0)][DBLP ] Conf ] S. Andersson , J. Dabrowski , C. Svensson , J. Konopacki SC filter for RF down conversion with wideband image rejection. [Citation Graph (0, 0)][DBLP ] Conf ] S. Araki , H. Sawada , R. Mukai , S. Makino Underdetermined sparse source separation of convolutive mixtures with observation vector clustering. [Citation Graph (0, 0)][DBLP ] Conf ] Cédric Archambeau , M. Valle , A. Assenza , Michel Verleysen Assessment of probability density estimation methods: Parzen window and finite Gaussian mixtures. [Citation Graph (0, 0)][DBLP ] Conf ] Anuj Batra , S. Lingam , Jaiganesh Balakrishnan Multi-band OFDM: a cognitive radio for UWB. [Citation Graph (0, 0)][DBLP ] Conf ] Rashed Zafar Bhatti , Monty Denneau , Jeff Draper Phase measurement and adjustment of digital signals using random sampling technique. [Citation Graph (0, 0)][DBLP ] Conf ] Yuval Bistritz Testing a polynomial for zeros inside the unit-circle over the ring of Gaussian integers. [Citation Graph (0, 0)][DBLP ] Conf ] Federico Bizzarri , D. Stellardo , Marco Storace Experimental validation of the bifurcation analysis of a hysteresis oscillator. [Citation Graph (0, 0)][DBLP ] Conf ] Grzegorz Blakiewicz , Malgorzata Chrzanowska-Jeske Estimation of supply current spectrum for early noise evaluation. [Citation Graph (0, 0)][DBLP ] Conf ] Evelyn Brannock , Michael Weeks , V. Rehder Detecting filopodia with wavelets. [Citation Graph (0, 0)][DBLP ] Conf ] Meng-chou Chang , Jung-shan Chien An adaptive search algorithm based on block classification for fast block motion estimation. [Citation Graph (0, 0)][DBLP ] Conf ] Jie Chen , Hua Li Design methodology for hardware-efficient fault-tolerant nanoscale circuits. [Citation Graph (0, 0)][DBLP ] Conf ] Zhenzhong Chen , King Ngi Ngan Towards rate-distortion tradeoff in real-time color video coding. [Citation Graph (0, 0)][DBLP ] Conf ] Wu-Hua Chen , Wei Xing Zheng A study of complete stability for delayed cellular neural networks. [Citation Graph (0, 0)][DBLP ] Conf ] B. Chung , J. B. Kuo Gate-level dual-threshold static power optimization methodology (GDSPOM) for designing high-speed low-power SOC applications using 90nm MTCMOS technology. [Citation Graph (0, 0)][DBLP ] Conf ] Aaron E. Cohen , Keshab K. Parhi Faster elliptic curve point multiplication based on a novel greedy base-2, 3 method. [Citation Graph (0, 0)][DBLP ] Conf ] Harmander Deogun , Dennis Sylvester , Kevin J. Nowka Fine grained multi-threshold CMOS for enhanced leakage reduction. [Citation Graph (0, 0)][DBLP ] Conf ] Eric E. Fabris , Luigi Carro , Sergio Bampi Reconfigurable analog interface for mixed signal SOC. [Citation Graph (0, 0)][DBLP ] Conf ] Sadeka Ali , Margala Margala A 2.4-GHz auto-calibration frequency synthesizer with on-chip built-in-self-test solution. [Citation Graph (0, 0)][DBLP ] Conf ] Da-Zheng Feng , Wei Xing Zheng An efficient algorithm for blind separation of multiple independent sources. [Citation Graph (0, 0)][DBLP ] Conf ] G. Fikos , L. Nalpantidis , S. Siskos A low-voltage, analog power-law function generator. [Citation Graph (0, 0)][DBLP ] Conf ] Matthias Frey , Hans-Andrea Loeliger On flash A/D-converters with low-precision comparators. [Citation Graph (0, 0)][DBLP ] Conf ] C. C. Fung , Man-Wai Kwan , Chi-Wah Kok HOS based minimal transmit redundancy space-time FIR precoder-blind equalizer. [Citation Graph (0, 0)][DBLP ] Conf ] Yehya H. Ghallab , Wael M. Badawy A single CMOS chip for biocell trapping, levitation, detection and characterization. [Citation Graph (0, 0)][DBLP ] Conf ] Nicola Ghittori , Andrea Vigna , Piero Malcovati , Stefano D'Amico , Andrea Baschirotto Analog baseband channel for GSM/UMTS/WLAN/Bluetooth reconfigurable multistandard terminals. [Citation Graph (0, 0)][DBLP ] Conf ] F. Gomez-Rodriguez , R. Paz , Alejandro Linares-Barranco , M. Rivas , L. Miro-Amarante , S. Vicente , Gabriel Jiménez , Antón Civit AER tools for communications and debugging. [Citation Graph (0, 0)][DBLP ] Conf ] Mark M. Gourary , Sergey G. Rusakov , Sergey L. Ulyanov , Michael M. Zharov , Brian J. Mulvaney Spice-oriented iterative technique for distortion analysis. [Citation Graph (0, 0)][DBLP ] Conf ] Afshin Haftbaradaran , K. W. Martin Mismatch compensation techniques using random data for time-interleaved A/D converters. [Citation Graph (0, 0)][DBLP ] Conf ] Zhiyong He , Sébastien Roy , Paul Fortier Encoder architecture with throughput over 10 Gbit/sec for quasi-cyclic LDPC codes. [Citation Graph (0, 0)][DBLP ] Conf ] Guochi Huang , Tae-sung Kim , Byung-Sung Kim , Mingyan Yu , Yizheng Ye Post linearization of CMOS LNA using double cascade FETs. [Citation Graph (0, 0)][DBLP ] Conf ] Tuomas Järvinen , Perttu Salmela , Konsta Punkka , Jarmo Takala Evaluation of stride permutation networks. [Citation Graph (0, 0)][DBLP ] Conf ] Damian Grzechca , Tomasz Golonek , Jerzy Rutkowski Analog fault AC dictionary creation - the fuzzy set approach. [Citation Graph (0, 0)][DBLP ] Conf ] S. Mukhopadhyay , P. Sarkar Hardware architecture and trade-offs for generic inversion of one-way functions. [Citation Graph (0, 0)][DBLP ] Conf ] H. Ishebabi , Gerd Ascheid , Heinrich Meyr , O. Atak , A. Atalar , E. Arikan An efficient parallelization technique for high throughput FFT-ASIPs. [Citation Graph (0, 0)][DBLP ] Conf ] Juha Yli-Kaakinen , Tapio Saramäki Approximately linear-phase recursive digital filters with variable magnitude characteristics. [Citation Graph (0, 0)][DBLP ] Conf ] A. Yasuda , A. Ohkubo , K. Ogata , H. Ueno , T. Anzai , T. Kimura , K. Ochiai , T. Hamasaki A single-chip audio system with delta-sigma DAC and class-D amplifier. [Citation Graph (0, 0)][DBLP ] Conf ] Arjuna Madanayake , Leonard T. Bruton Single-chip FPGA architecture for 3D IIR broadband spatio-temporal beam plane-wave filters. [Citation Graph (0, 0)][DBLP ] Conf ] M. Pelissier , F. Demeestere , F. Hameau , D. Morche , C. Delaveaud LNA-antenna codesign for UWB systems. [Citation Graph (0, 0)][DBLP ] Conf ] P. Popplewell , V. Karam , Atef Shamim , John W. M. Rogers , M. Cloutier , Calvin Plett 5.2 GHz self-powered lock and roll radio using VCO injection-locking and on-chip antennas. [Citation Graph (0, 0)][DBLP ] Conf ] Pasquale Corsonello , Stefania Perri , Martin Margala An integrated countermeasure against differential power analysis for secure smart-cards. [Citation Graph (0, 0)][DBLP ] Conf ] Chi-Wang Ho , Oscar C. Au , S.-H. Gary Chan , Hoi-Ming Wong , Shu-Kei Yip Improved refinement search for H.263 to H.264/AVC transcoding based on the minimum cost tendency search. [Citation Graph (0, 0)][DBLP ] Conf ] R. Chen Jr. , Po-Lin Chiu , Hua-Lung Yang Design and performance analysis of DS-UWB rake receiver. [Citation Graph (0, 0)][DBLP ] Conf ] Ching-Yeh Chen , Yi-Hau Chen , Chih-Chi Cheng , Liang-Gee Chen Frame-level data reuse for motion-compensated temporal filtering. [Citation Graph (0, 0)][DBLP ] Conf ] D. S. Karadimas , D. N. Mavridis , K. A. Efstathiou A digitally calibrated R-2R ladder architecture for high performance digital-to-analog converters. [Citation Graph (0, 0)][DBLP ] Conf ] Jun-Bao Li , Jeng-Shyang Pan , Zhe-Ming Lu , Jung-Chou Harry Chang Complete Kernel Fisher discriminant analysis of Gabor features with fractional power polynomial models for face recognition. [Citation Graph (0, 0)][DBLP ] Conf ] S. A. Fattah , Wei-Ping Zhu , M. Omair Ahmad A blind identification technique for noisy ARMA systems. [Citation Graph (0, 0)][DBLP ] Conf ] Andrew Kinane , Valentin Muresan , Noel E. O'Connor Towards an optimised VLSI design algorithm for the constant matrix multiplication problem. [Citation Graph (0, 0)][DBLP ] Conf ] X. Ruan , R. Katti , D. Hinkemeyer Algorithm and implementation of signed-binary recoding with asymmetric digit sets for elliptic curve cryptosystems. [Citation Graph (0, 0)][DBLP ] Conf ] R. M. Shubair , W. Jassmi Performance analysis of optimum SMI beamformers for spatial interference rejection. [Citation Graph (0, 0)][DBLP ] Conf ] H. Yoshizawa , G. C. Temes Switched-capacitor track-and-hold amplifier with low sensitivity to op-amp imperfections. [Citation Graph (0, 0)][DBLP ] Conf ] Guofu Gui , Ling-ge Jiang , Chen He A new watermarking system for joint ownership verification. [Citation Graph (0, 0)][DBLP ] Conf ] Po-Tsang Huang , Wei Hwang 2-level FIFO architecture design for switch fabrics in network-on-chip. [Citation Graph (0, 0)][DBLP ] Conf ] Sadiq M. Sait , Ali Mustafa Zaidi , Mustafa I. Ali Asynchronous MMC based parallel SA schemes for multiobjective standard cell placement. [Citation Graph (0, 0)][DBLP ] Conf ] Woochul Jeon , John Melngailis , Robert W. Newcomb Disposable CMOS passive RFID transponder for patient monitoring. [Citation Graph (0, 0)][DBLP ] Conf ] Hsien-Ku Chen , J. R. Sha , Sung-Huang Lee , Da-Chiang Chang , Ying-Zong Juang , Chin-Fong Chin A novel LNA-mixer design with on-chip balun. [Citation Graph (0, 0)][DBLP ] Conf ] Vasily G. Moshnyaga , S. Yamaoka MPEG complexity reduction by scene adaptive motion estimation. [Citation Graph (0, 0)][DBLP ] Conf ] Duminda A. Dewasurendra , Peter H. Bauer , Kamal Premaratne Distributed evidence filtering: the recursive case. [Citation Graph (0, 0)][DBLP ] Conf ] Hongjie Bai , Sheqin Dong , Xianlong Hong , Song Chen Buffer planning based on block exchanging. [Citation Graph (0, 0)][DBLP ] Conf ] Bruno Ando , Salvatore Baglio , Vincenzo Sacco , Adi R. Bulsara , Visarath In , Andy Kho , Antonio Palacios , Patrick Longhini Dynamic cooperative behavior in a coupled-core fluxgate magnetometer. [Citation Graph (0, 0)][DBLP ] Conf ] S. Moro , K. Hamamoto , T. Matsumoto Number of stimulation units needed to derive all the phase patterns in pulse-driven star-coupled LC oscillators. [Citation Graph (0, 0)][DBLP ] Conf ] J. Gomez-Vilardebo , Ana Pérez-Neira , Miguel A. Lagunas Average rate behavior for cooperative diversity in wireless networks. [Citation Graph (0, 0)][DBLP ] Conf ] Geng-xin Ning , Shu-hung Leung , Kam-keung Chu , Gang Welt A parallel model combination scheme with improved delta parameter compensation. [Citation Graph (0, 0)][DBLP ] Conf ] You-Ming Tsao , Chi-Ling Wu , Shao-Yi Chien , Liang-Gee Chen Adaptive tile depth filter for the depth buffer bandwidth minimization in the low power graphics systems. [Citation Graph (0, 0)][DBLP ] Conf ] Sankaran Aniruddhan , S. Shekhar , David J. Allstot A delay generation technique for fast-locking frequency synthesizers. [Citation Graph (0, 0)][DBLP ] Conf ] Tejasvi Das , Ponnathpur R. Mukund Self-calibration of gain and output match in LNAs. [Citation Graph (0, 0)][DBLP ] Conf ] Chi-Hong Chan , Cheong-fat Chan , Oliver Chiu-sing Choy , Kong-Pang Pun A 6-digit CMOS current-mode analog-to-quaternary converter with RSD error correction algorithm. [Citation Graph (0, 0)][DBLP ] Conf ] Jingcheng Zhuang , Qingjin Du , Tad A. Kwasniewski An eye detection technique for clock and data recovery applications. [Citation Graph (0, 0)][DBLP ] Conf ] Lejla Batina , Nele Mentens , Bart Preneel , Ingrid Verbauwhede Flexible hardware architectures for curve-based cryptography. [Citation Graph (0, 0)][DBLP ] Conf ] Sunwoo Kwon , Hoi Lee A 1.2V, 3.5µW, 20MS/s, 8-bit comparator with dynamic-biasing preamplifier. [Citation Graph (0, 0)][DBLP ] Conf ] V. T. Nguyen , Patrick Loumeau , J.-F. Naviner A CMOS implementation of time-interleaved high-pass Delta Sigma modulator. [Citation Graph (0, 0)][DBLP ] Conf ] Xun Guo , Yan Lu , Feng Wu , Wen Gao Distributed video coding using wavelet. [Citation Graph (0, 0)][DBLP ] Conf ] Benjamas Tongprasit , Tadashi Shibata Power-balanced reconfigurable floating-gate-MOS logic circuit for tamper resistant VLSI. [Citation Graph (0, 0)][DBLP ] Conf ] Su-Jeong Sim , Jeongmin Park , Sung Min Park A 1.8V, 60dB Omega 11 GHz transimpedance amplifier with strong immunity to input parasitic capacitance. [Citation Graph (0, 0)][DBLP ] Conf ] A. Satoh High-speed hardware architectures for authenticated encryption mode GCM. [Citation Graph (0, 0)][DBLP ] Conf ] Wen-Chung Kao , Sheng-Hong Wang , Wei-Hsin Che , Lien-Yang Chen , Sheng-Yuan Lin Designing image processing pipeline for color imaging systems. [Citation Graph (0, 0)][DBLP ] Conf ] Aiman H. El-Maleh , Sadiq M. Sait , F. Nawaz Khan Finite state machine state assignment for area and power minimization. [Citation Graph (0, 0)][DBLP ] Conf ] Sanghyun Woo , Hyeongseok Yu , Jeakon Lee , Chang-ho Lee , Joy Laskar Effects of RF impairments in transmitter for the future beyond-3G communications systems. [Citation Graph (0, 0)][DBLP ] Conf ] Xueyuan Zhao , Xiaolin Hou Interlaced pilot channel estimation in MIMO-OFDM systems. [Citation Graph (0, 0)][DBLP ] Conf ] Dazhi Wei , Vaibhav Garg , John G. Harris An asynchronous delta-sigma converter implementation. [Citation Graph (0, 0)][DBLP ] Conf ] S. Haider , S. A. Osmany , H. Gustat , B. Heinemann A 10GS/s 2Vpp emitter follower only track and hold amplifier in SiGe BiCMOS technology. [Citation Graph (0, 0)][DBLP ] Conf ] C. Antweiler , P. Vary , E. Di Martino Virtual time-variant model of the Eustachian tube. [Citation Graph (0, 0)][DBLP ] Conf ] Carlos Meza , Domingo Biel , J. J. Negroni , Francesc Guinjoan Considerations on the control design of DC-link based inverters in grid-connected photovoltaic systems. [Citation Graph (0, 0)][DBLP ] Conf ] Uthman Alsaiari , Resve Saleh Testable and self-repairable structured logic design. [Citation Graph (0, 0)][DBLP ] Conf ] N. Vlassopoulos , D. Reisis , G. Lentaris , G. Tombras , E. Prosalentis , N. Ritas , Kostas Tsakalis An approach for efficient design of digital amplifiers. [Citation Graph (0, 0)][DBLP ] Conf ] Sheqin Dong , Shuyi Zheng , Xianlong Hong Floorplanning for 2.5-D system integration using multi-layer-BSG structure. [Citation Graph (0, 0)][DBLP ] Conf ] Chih-Chi Cheng , Ching-Yeh Chen , Yi-Hau Chen , Liang-Gee Chen Analysis and VLSI architecture of update step in motion-compensated temporal filtering. [Citation Graph (0, 0)][DBLP ] Conf ] Shaojun Wei , Sheqin Dong , Xianlong Hong , Youliang Wu On handling the fixed-outline constraints of floorplanning using less flexibility first principles. [Citation Graph (0, 0)][DBLP ] Conf ] Sanqing Hu , Derong Liu , Jun Wang Sequential blind extraction of instantaneous mixtures with arbitrary rank. [Citation Graph (0, 0)][DBLP ] Conf ] Aijiao Cui , Chip-Hong Chang Stego-signature at logic synthesis level for digital design IP protection. [Citation Graph (0, 0)][DBLP ] Conf ] P. Phensadsaeng , Pinit Kumhom , Kosin Chamnongthai A computer-aided-diagnosis of tonsillitis using tonsil size and color. [Citation Graph (0, 0)][DBLP ] Conf ] Zhibo Chen , Zhengang Nie , Xiaodong Gu , Lihua Zhu , Charles Wang Fast global motion estimation based on iteration least-square estimation with sustained symmetrical structure. [Citation Graph (0, 0)][DBLP ] Conf ] Cheng-Ta Chan , Oscal T.-C. Chen Inductor-less 10Gb/s CMOS transimpedance amplifier using source-follower regulated cascode and double three-order active feedback. [Citation Graph (0, 0)][DBLP ] Conf ] S. Terada , Ichirou Oota , Kei Eguchi , Fumio Ueno Separate type switched-capacitor (SC) AC-DC converter. [Citation Graph (0, 0)][DBLP ] Conf ] E. O. Torres , Min Chen , H. Pooya Forghani-zadeh , Vishal Gupta , Neeraj Keskar , L. A. Milner , Hsuan-I Pan , Gabriel A. Rincón-Mora SiP integration of intelligent, adaptive, self-sustaining power management solutions for portable applications. [Citation Graph (0, 0)][DBLP ] Conf ] Saad Bouguezel , M. Omair Ahmad , M. N. S. Swamy Design of a multidimensional split vector-radix decimation-in-frequency FFT algorithm. [Citation Graph (0, 0)][DBLP ] Conf ] A. Dupret , Marius Vasiliu , Francis Devos Performance and power analysis on asynchronous reading of binary arrays. [Citation Graph (0, 0)][DBLP ] Conf ] J. N. Y. Aziz , Roman Genov , B. R. Bardakjian , M. Derchansky , P. L. Carlen 256-channel integrated neural interface and spatio-temporal signal processor. [Citation Graph (0, 0)][DBLP ] Conf ] Yeong-Jae Oh , Hanho Lee , Chong Ho Lee A reconfigurable FIR filter design using dynamic partial reconfiguration. [Citation Graph (0, 0)][DBLP ] Conf ] Anand Pappu , Tao Yin , Alyssa B. Apsel A low-voltage supply optoelectronic detector-receiver in a commercial silicon-based process. [Citation Graph (0, 0)][DBLP ] Conf ] Chung-Chi Lin , Chih-Jen Wei , Ming-Hwa Sheu , Huann-Keng Chiang , Chishyan Liaw The VLSI design of de-interlacing with scene change detection. [Citation Graph (0, 0)][DBLP ] Conf ] F. C. Castaldo , C. A. Reis Filho Transversal noise current in split-drain transistors. [Citation Graph (0, 0)][DBLP ] Conf ] Yi-Qiang Zhao , Andreas Demosthenous , R. H. Bayford A CMOS instrumentation amplifier for wideband bioimpedance spectroscopy systems. [Citation Graph (0, 0)][DBLP ] Conf ] Byungsub Kim , Soumyajit Mandal , Rahul Sarpeshkar Power-adaptive operational amplifier with positive-feedback self biasing. [Citation Graph (0, 0)][DBLP ] Conf ] I. L. Syllaios , Poras T. Balsara , O. E. Eliezer A generalized signal reconstruction method for designing interpolation filters. [Citation Graph (0, 0)][DBLP ] Conf ] Ta-Tao Hsu , Chien-Nan Kuo Low voltage 2-mW 6~10.6-GHz ultra-wideband CMOS mixer with active balun. [Citation Graph (0, 0)][DBLP ] Conf ] Guoji Zhu , A. Opal Sensitivity analysis of nonlinear circuits using Volterra series. [Citation Graph (0, 0)][DBLP ] Conf ] Raffaele Parisi , P. Croene , Aurelio Uncini Particle swarm localization of acoustic sources in the presence of reverberation. [Citation Graph (0, 0)][DBLP ] Conf ] Chunjie Duan , Sunil P. Khatri Computing during supply voltage switching in DVS enabled real-time processors. [Citation Graph (0, 0)][DBLP ] Conf ] A. Carlosena , Wing-Yee Chu , B. Bakkaloglu , S. Kiaei Randomized carrier PWM with exponential frequency mapping. [Citation Graph (0, 0)][DBLP ] Conf ] Yilong Liu , Soontorn Oraintara Feature-oriented multiple description image coding. [Citation Graph (0, 0)][DBLP ] Conf ] T. Wiangtong , P. Dechsuwan Unified motor controller based on space vector modulation technique. [Citation Graph (0, 0)][DBLP ] Conf ] Tung-Chien Chen , Yu-Han Chen , Chuan-Yung Tsai , Liang-Gee Chen Low power and power aware fractional motion estimation of H.264/AVC for mobile applications. [Citation Graph (0, 0)][DBLP ] Conf ] C. Olalla , R. Leyva , A. El Aroudi QFT control for DC-DC buck converters. [Citation Graph (0, 0)][DBLP ] Conf ] K. Yamaoka , Takashi Morimoto , Hidekazu Adachi , K. Awane , Tetsushi Koide , Hans Jürgen Mattausch Multi-object tracking VLSI architecture using image-scan based region growing and feature matching. [Citation Graph (0, 0)][DBLP ] Conf ] Bo-Shih Huang , Ming-Dou Ker New matching methodology of low-noise amplifier with ESD protection. [Citation Graph (0, 0)][DBLP ] Conf ] Zhisheng Duan , Jingxin Zhang , Cishen Zhang , Edoardo Mosca Reduced-order Hinfinity and H2 design of multirate filter banks using PDLF method. [Citation Graph (0, 0)][DBLP ] Conf ] Mohammad Taherzadeh-Sani , Anas A. Hamoui Analysis of dynamic element matching (DEM) in pipelined ADCs. [Citation Graph (0, 0)][DBLP ] Conf ] Anand Pappu , Alyssa B. Apsel Demonstration of latency reduction in electrical interconnections using optical fanout. [Citation Graph (0, 0)][DBLP ] Conf ] Tianxiao Ye , Yap-Peng Tan , Ping Xue A low complexity H.263 to H.264 transcoder. [Citation Graph (0, 0)][DBLP ] Conf ] Cesare Alippi , Manuel Roveri An adaptive CUSUM-based test for signal change detection. [Citation Graph (0, 0)][DBLP ] Conf ] Cristiano Azzolini , P. Milanesi , Andrea Boni Accurate transient response model for automatic synthesis of high-speed operational amplifiers. [Citation Graph (0, 0)][DBLP ] Conf ] Xin Zhao , Yici Cai , Qiang Zhou , Xianlong Hong A novel low-power physical design methodology for MTCMOS. [Citation Graph (0, 0)][DBLP ] Conf ] S. Yoshizawa , Y. Miyanaga , H. Ochi , Y. Itho , N. Hataoka , B. Sai , N. Takayama , M. Hirata 300-Mbps OFDM baseband transceiver for wireless LAN systems. [Citation Graph (0, 0)][DBLP ] Conf ] Il-Gu Lee , Jungbo Son , Eunyoung Choi , Sok-Kyu Lee Fast automatic gain control employing two compensation loop for high throughput MIMO-OFDM receivers. [Citation Graph (0, 0)][DBLP ] Conf ] Robert Bregovic , Tapio Saramäki , Ya Jun Yu , Yong Ching Lim An efficient implementation of linear-phase FIR filters for a rational sampling rate conversion. [Citation Graph (0, 0)][DBLP ] Conf ] Kazunori Shimizu , Tatsuyuki Ishikawa , Nozomu Togawa , Takeshi Ikenaga , Satoshi Goto A parallel LSI architecture for LDPC decoder improving message-passing schedule. [Citation Graph (0, 0)][DBLP ] Conf ] K. Zaplatilek , K. Hajek Time domain analysis of analog filters in MATLAB environment. [Citation Graph (0, 0)][DBLP ] Conf ] A. Sharma , Y. S. Pavan A single inductor multiple output converter with adaptive delta current mode control. [Citation Graph (0, 0)][DBLP ] Conf ] L. Marco , Alberto Poveda , Eduard Alarcón , Dragan Maksimovic Bandwidth limits in PWM switching amplifiers. [Citation Graph (0, 0)][DBLP ] Conf ] David G. Haigh Analytic approach to or transformations for FET circuit synthesis. Part II. Nullator-norator re-pairing and cloning. [Citation Graph (0, 0)][DBLP ] Conf ] An P. N. Vo , Truong T. Nguyen , Soontorn Oraintara Texture image retrieval using complex directional filter bank. [Citation Graph (0, 0)][DBLP ] Conf ] E. Seagraves , B. Walcott Online calibration of quadrature low-IF receivers. [Citation Graph (0, 0)][DBLP ] Conf ] Arjuna Madanayake , Leonard T. Bruton Circular array based 2D recursive filtering using a spatio-temporal helix transform. [Citation Graph (0, 0)][DBLP ] Conf ] Jin-Tai Yan , Yen-Hsiang Chen , Chia-Fang Lee , Ming-Ching Huang Multilevel timing-constrained full-chip routing in hierarchical quad-grid model. [Citation Graph (0, 0)][DBLP ] Conf ] Thushara K. Gunaratne , Leonard T. Bruton Tracking broadband plane waves using 2D adaptive FIR fan filters. [Citation Graph (0, 0)][DBLP ] Conf ] Meng Wang , Xian-Sheng Hua , Yan Song , Li-Rong Dai , Shipeng Li Automatic video annotation based on co-adaptation and label correction. [Citation Graph (0, 0)][DBLP ] Conf ] Kiyotaka Yamamura , Wataru Kuroki An efficient homotopy method that can be easily implemented on SPICE. [Citation Graph (0, 0)][DBLP ] Conf ] Y. S. Yu , H. W. Kye , B. N. Song , S.-J. Kim , J.-B. Choi A new multi-valued static random access memory (MVSRAM) with hybrid circuit consisting of single-electron (SE) and MOSFET. [Citation Graph (0, 0)][DBLP ] Conf ] Chi-Sun Tang , Chen-Han Tsai , Shao-Yi Chien , Liang-Gee Chen Algorithm and hardware architecture design for weighted prediction in H.264/MPEG-4 AVC. [Citation Graph (0, 0)][DBLP ] Conf ] Daniele Vigliano , Raffaele Parisi , Aurelio Uncini An IIR architecture for BSS in strong nonlinear convolutive environments. [Citation Graph (0, 0)][DBLP ] Conf ] Ming-Dou Ker , Chien-Hua Wu Design on LVDS receiver with new delay-selecting technique for UXGA flat panel display applications. [Citation Graph (0, 0)][DBLP ] Conf ] Cor Meenderinck , Sorin Cotofana Electron counting based high-radix multiplication in single electron tunneling technology. [Citation Graph (0, 0)][DBLP ] Conf ] Hsin-Hsiung Huang , Yung-Ching Chen , Tsai-Ming Hsieh A congestion-driven buffer planner with space reservation. [Citation Graph (0, 0)][DBLP ] Conf ] Shunsuke Yamaki , Masahide Abe , Masayuki Kawamata A closed form solution to L2 -sensitivity minimization of second-order state-space digital filters. [Citation Graph (0, 0)][DBLP ] Conf ] Ediz Çetin , Izzet Kale , Richard C. S. Morling Efficient low-power design and implementation of IQ-imbalance compensator using early termination. [Citation Graph (0, 0)][DBLP ] Conf ] H. Suzuki , K. Wada , Y. Tadokoro Band connections in active cancellation circuits against digital substrate noise. [Citation Graph (0, 0)][DBLP ] Conf ] Nainesh Agarwal , Nikitas J. Dimopoulos Power efficient rapid hardware development using CoDel and automated clock gating. [Citation Graph (0, 0)][DBLP ] Conf ] Tahereh Kahookar Toosi , Ehsan Zhian Tabasy , Hassan Sarbishaei , Reza Lotfi ISECAD: an iterative simulation-equation-based opamp-design CAD tool. [Citation Graph (0, 0)][DBLP ] Conf ] Jian-Hung Lin , Keshab K. Parhi Low complexity block turbo equalization. [Citation Graph (0, 0)][DBLP ] Conf ] José M. Quintana , Maria J. Avedillo , Héctor Pettenghi Self-latching operation limits for MOBILE circuits. [Citation Graph (0, 0)][DBLP ] Conf ] S. C. Chan , K. M. Tsui The wordlength determination problem of linear time invariant systems with multiple outputs - a geometric programming approach. [Citation Graph (0, 0)][DBLP ] Conf ] Marco Balsi , Francesco Centurelli , Piero Marietti , Giuseppe Scotti , P. Tommasino , Alessandro Trifiletti , G. Valente Validation of a statistical non-linear model of GaAs HEMT MMIC's by hypothesis testing and principal components analysis. [Citation Graph (0, 0)][DBLP ] Conf ] Lijuan Luo , Qiang Zhou , Yici Cai , Xianlong Hong , Yibo Wang A novel technique integrating buffer insertion into timing driven placement. [Citation Graph (0, 0)][DBLP ] Conf ] Haiyan Shu , Lap-Pui Chau Generalized arbitrary resizing for video transcoding. [Citation Graph (0, 0)][DBLP ] Conf ] Fei Sun , Tong Zhang Low power state-parallel relaxed adaptive Viterbi decoder design and implementation. [Citation Graph (0, 0)][DBLP ] Conf ] M. S. Khan , N. Yanduru Analysis of signal distortion due to third order nonlinearity in WCDMA receivers. [Citation Graph (0, 0)][DBLP ] Conf ] Saraju P. Mohanty , Elias Kougianos , Ramakrishna Velagapudi , Valmiki Mukherjee Scheduling and binding for low gate leakage nanoCMOS datapath circuit synthesis. [Citation Graph (0, 0)][DBLP ] Conf ] Eugenio Culurciello , Andreas G. Andreou 3D integrated sensors in silicon-on-sapphire CMOS. [Citation Graph (0, 0)][DBLP ] Conf ] Kwisung Yoo , Gunhee Han An adaptation method for FIR pre-emphasis filter on backplane channel. [Citation Graph (0, 0)][DBLP ] Conf ] K. O. Cheng , N. F. Law , W. C. Siu Co-occurrence features of multi-scale directional filter bank for texture characterization. [Citation Graph (0, 0)][DBLP ] Conf ] Bahattin Koc , Adil Koukab , Günhan Dündar Phase noise in bipolar and CMOS VCO's - an analytical comparison. [Citation Graph (0, 0)][DBLP ] Conf ] Massimo Alioto , Gaetano Palumbo , Massimo Poli Efficient output transition time modeling in CMOS gates with ramp/exponential inputs. [Citation Graph (0, 0)][DBLP ] Conf ] T. Lovitt , Calvin Plett , John W. M. Rogers A 0.13µm CMOS delay cell for 40 Gb/s FFE equalization. [Citation Graph (0, 0)][DBLP ] Conf ] Saeid Mehrmanesh , B. Eghbalkhah , Saeed Saeedi , Ali Afzali-Kusha , Seyed Mojtaba Atarodi A compact low power mixed-signal equalizer for gigabit Ethernet applications. [Citation Graph (0, 0)][DBLP ] Conf ] R. Kazazoglu , Süleyman Sirri Demirsoy , Izzet Kale , Richard C. S. Morling A computationally efficient DAB bit-stream processor. [Citation Graph (0, 0)][DBLP ] Conf ] Alessandro Girardi , F. P. Cortes , Sergio Bampi A tool for automatic design of analog circuits based on gm/ID methodology. [Citation Graph (0, 0)][DBLP ] Conf ] S. Al-Araji , M. Al-Qutayri , A. Al-Zaabi Adaptive TDTL with enhanced performance using sample sensing technique. [Citation Graph (0, 0)][DBLP ] Conf ] V. T. Nguyen , Patrick Loumeau , Jean-François Naviner High-pass Delta Sigma modulator: from system analysis to circuit design. [Citation Graph (0, 0)][DBLP ] Conf ] Martin Simka , Milos Drutarovský , Viktor Fischer , J. Fayolle Model of a true random number generator aimed at cryptographic applications. [Citation Graph (0, 0)][DBLP ] Conf ] Baoyong Chi , Jinke Yao , Shuguang Han , Xiang Xie , GuoLin Li , Zhihua Wang A 2.4GHz low power wireless transceiver analog front-end for endoscopy capsule system. [Citation Graph (0, 0)][DBLP ] Conf ] Eric C. Moule , Zeljko Ignjatovic A 2-path bandpass sigma-delta modulator utilizing blue-noise path selection. [Citation Graph (0, 0)][DBLP ] Conf ] Kiran Puttaswamy , Gabriel H. Loh The impact of 3-dimensional integration on the design of arithmetic units. [Citation Graph (0, 0)][DBLP ] Conf ] Pramod Kumar Meher , Jagdish Chandra Patra , M. R. Meher Low-complexity technique for secure storage and sharing of biomedical images. [Citation Graph (0, 0)][DBLP ] Conf ] Feng Liu , Chi-Ying Tsui Energy-aware optimal workload allocation among the battery-powered devices to maximize the co-operation life time. [Citation Graph (0, 0)][DBLP ] Conf ] K. Haddadi , D. Glay , T. Lasri Homodyne dual six-port network analyzer and associated calibration technique for millimeter wave measurements. [Citation Graph (0, 0)][DBLP ] Conf ] Oimins Xu , Xueqing Hu , Pens Gao , Jun Yan , Shi Yin , Foster F. Dai , Richard C. Jaeger A direct-conversion mixer with DC-offset cancellation for IEEE 802.11a WLAN receiver. [Citation Graph (0, 0)][DBLP ] Conf ] Zhiqiang Lin , Michael W. Hoffman , Walter D. Leon , Nathan Schemm , Sina Balkir Effects of charge-based computation non-idealities on CMOS image compression sensors. [Citation Graph (0, 0)][DBLP ] Conf ] S. Alenin , D. Spady , V. Ivanov A low ripple on-chip charge pump for bootstrapping of the noise-sensitive nodes. [Citation Graph (0, 0)][DBLP ] Conf ] Francesco Centurelli , Pietro Monsurrò , Alessandro Trifiletti A model for the distortion due to switch on-resistance in sample-and-hold circuits. [Citation Graph (0, 0)][DBLP ] Conf ] K. Shimizu , T. Endo , H. Tanaka Averaging method analysis of a new mutual synchronization method from living organism. [Citation Graph (0, 0)][DBLP ] Conf ] Seiichiro Hiratsuka , Satoshi Goto , Takeshi Ikenaga An ultra-low complexity motion estimation algorithm and its implementation of specific processor. [Citation Graph (0, 0)][DBLP ] Conf ] A. Maurudis , Fei Huang , D. Castillo , Puyun Guo , Shikui Yan , Quing Zhu A novel electronic architecture used to support biomedical photo-acoustic imaging. [Citation Graph (0, 0)][DBLP ] Conf ] Charles E. Stroud , Dayu Yang , Foster F. Dai Analog frequency response measurement in mixed-signal systems. [Citation Graph (0, 0)][DBLP ] Conf ] Wei-Jung Chien , Lina J. Karam , Glen P. Abousleman Distributed video coding with 3D recursive search block matching. [Citation Graph (0, 0)][DBLP ] Conf ] P. Samsukha , C. Chestek , S. L. Garverick Neurodynamic interface circuits for a multichannel, wireless sensor IC operating in saltwater. [Citation Graph (0, 0)][DBLP ] Conf ] Viktor Gruev , Jan Van der Spiegel , Ralf M. Philipp , Ralph Etienne-Cummings Image sensor with general spatial processing in a 3D integrated circuit technology. [Citation Graph (0, 0)][DBLP ] Conf ] Stefano Squartini , Francesco Piazza , Fabian J. Theis New Riemannian metrics for speeding-up the convergence of over- and underdetermined ICA. [Citation Graph (0, 0)][DBLP ] Conf ] Volnei A. Pedroni , R. U. Pedroni PLL-less clock multiplier with self-adjusting phase symmetry. [Citation Graph (0, 0)][DBLP ] Conf ] Tsung-Han Tsai , Yung-Tsung Wang , Jui Hong Hung , Chin-Long Wey Compressed domain content-based retrieval of MP3 audio example using quantization tree indexing and melody-line tracking method. [Citation Graph (0, 0)][DBLP ] Conf ] Murari Kejariwal , Prasad Ammisetti , John Melanson Built-in self-test mode in a multi-path feedforward compensated operational amplifier. [Citation Graph (0, 0)][DBLP ] Conf ] Miriam Adlerstein Marwick , Francisco Tejada , Philippe O. Pouliquen , Eugenio Culurciello , Kim Strohbehn , Andreas G. Andreou Dark current and noise of 100nm thick silicon on sapphire CMOS lateral PIN photodiodes. [Citation Graph (0, 0)][DBLP ] Conf ] Jiawen Hu A clock recovery circuit for blind equalization multi-Gbps serial data links. [Citation Graph (0, 0)][DBLP ] Conf ] Suh Ho Lee , Jeong Hun Kim , Ji Hwan Park , Seon Wook Kim , Suki Kim Implementation of H.264/AVC decoder for mobile video applications. [Citation Graph (0, 0)][DBLP ] Conf ] F. Mandarino , R. Zelenovsky Performance analysis of the Bayesian beam former on the CDMA reverse channel. [Citation Graph (0, 0)][DBLP ] Conf ] D. Maroulis , N. Sgouros , D. Chaikalis FPGA-based architecture for real-time IP video and image compression. [Citation Graph (0, 0)][DBLP ] Conf ] Y. Matsuoka , Toshimichi Saito , Hiroyuki Torikai Complicated superstable behavior in a piecewise constant circuit with impulsive switching. [Citation Graph (0, 0)][DBLP ] Conf ] N. Rahman , A. Parayandeh , Kun Wang , A. Prodic Multimode digital SMPS controller IC for low-power management. [Citation Graph (0, 0)][DBLP ] Conf ] M. Ranjbar , G. R. Lahiji , Omid Oliaei A low power third order delta-sigma modulator for digital audio applications. [Citation Graph (0, 0)][DBLP ] Conf ] Nuno M. M. Rodrigues , Eduardo A. B. da Silva , Murilo B. de Carvalho , Sérgio M. M. de Faria , Vitor M. M. da Silva , F. Pinage Efficient dictionary design for multiscale recurrent pattern image coding. [Citation Graph (0, 0)][DBLP ] Conf ] Surendran K. Shanmugam , Henry Leung Parametric estimation of nonlinear systems through sequences designed using DNA computation. [Citation Graph (0, 0)][DBLP ] Conf ] Tetsuya Iizuka , Makoto Ikeda , Kunihiro Asada Exact minimum-width multi-row transistor placement for dual and non-dual CMOS cells. [Citation Graph (0, 0)][DBLP ] Conf ] Jeesung Lee , Hanho Lee , Sang-in Cho , Sang-Sung Choi A high-speed, low-complexity radix-24 FFT processor for MB-OFDM UWB systems. [Citation Graph (0, 0)][DBLP ] Conf ] Peter R. Kinget Amplitude detection inside CMOS LC oscillators. [Citation Graph (0, 0)][DBLP ] Conf ] I. LaRoche , S. Roy An efficient regular matrix inversion circuit architecture for MIMO processing. [Citation Graph (0, 0)][DBLP ] Conf ] Hailong Yao , Yici Cai , Xianlong Hong Congestion-driven W-shape multilevel full-chip routing framework. [Citation Graph (0, 0)][DBLP ] Conf ] Xing Zhang , Yirong Wang , Wenbo Wang Capacity analysis of adaptive multiuser frequency-time domain radio resource allocation in OFDMA systems. [Citation Graph (0, 0)][DBLP ] Conf ] José L. Ausín , Miguel Angel Domínguez , J. Francisco Duque-Carrillo , S. G. Torelli A non-uniform sampling approach for the reduction of capacitance spread in SC circuits. [Citation Graph (0, 0)][DBLP ] Conf ] Shunsuke Yamaki , Masahide Abe , Masayuki Kawamata A novel approach to L2 -sensitivity minimization of digital filters subject to L2 -scaling constraints. [Citation Graph (0, 0)][DBLP ] Conf ] Ji Hwan Park , Suh Ho Lee , Kyu-sam Lim , Jeong Hun Kim , Suki Kim A flexible transform processor architecture for multi-CODECs (JPEG, MPEG-2, 4 and H.264). [Citation Graph (0, 0)][DBLP ] Conf ] S. Radiom , B. Sheikholeslami , Hamed Aminzadeh , Reza Lotfi Folded-current-steering DAC: an approach to low-voltage high-speed high-resolution D/A converters. [Citation Graph (0, 0)][DBLP ] Conf ] H. R. Mahdiani , A. Banaiyan , Seid Mehdi Fakhraie Hardware implementation and comparison of new defuzzification techniques in fuzzy processors. [Citation Graph (0, 0)][DBLP ] Conf ] Jaber A. Abu-Qahouq , Lilly Huang Load adaptive control scheme to improve converter efficiency and performance. [Citation Graph (0, 0)][DBLP ] Conf ] Thomas Jacob Koickal , Alister Hamilton , T. C. Pearce , S. L. Tan , J. A. Covington , J. W. Gardner Analog VLSI design of an adaptive neuromorphic chip for olfactory systems. [Citation Graph (0, 0)][DBLP ] Conf ] Chun-Ying Lai , Shyh-Kang Jeng , Yao-Wen Chang , Chia-Chun Tsai Inductance extraction for general interconnect structures. [Citation Graph (0, 0)][DBLP ] Conf ] Yilong Liu , Truong T. Nguyen , Soontorn Oraintara Embedded image coding using quincunx directional filter bank. [Citation Graph (0, 0)][DBLP ] Conf ] Dimitrios N. Loizos , Paul-Peter Sotiriadis A quadrature sinusoidal oscillator with phase-preserving linear frequency control and independent static amplitude control. [Citation Graph (0, 0)][DBLP ] Conf ] Jun Ma , Alexander Vardy , Zhongfeng Wang Efficient fast interpolation architecture for soft-decision decoding of Reed-Solomon codes. [Citation Graph (0, 0)][DBLP ] Conf ] Behzad Mesgarzadeh , Atila Alvandpour A wide-tuning range 1.8 GHz quadrature VCO utilizing coupled ring oscillators. [Citation Graph (0, 0)][DBLP ] Conf ] L. Picolli , Franco Maloberti , A. Rossini , Fausto Borghetti , Piero Malcovati , Andrea Baschirotto A 10-bit pipeline A/D converter without timing signals. [Citation Graph (0, 0)][DBLP ] Conf ] Hossein Shamsi , Omid Shoaei A novel structure for the design of 2-1-1 cascaded continuous time delta sigma modulators. [Citation Graph (0, 0)][DBLP ] Conf ] Chun-Li Wu , Mona E. Zaghloul , Shumin Zhang CMOS mixer design with micromachined input matching circuits for wireless applications. [Citation Graph (0, 0)][DBLP ] Conf ] Iasonas F. Triantis , Andreas Demosthenous Interference severity in nerve cuff recordings due to muscle source relative proximity. [Citation Graph (0, 0)][DBLP ] Conf ] Leonidas G. Kotoulas , D. Tsarouchis , Georgios Ch. Sirakoulis , Ioannis Andreadis 1-d cellular automaton for pseudorandom number generation and its reconfigurable hardware implementation. [Citation Graph (0, 0)][DBLP ] Conf ] Tuan-Anh Phan , Chang-Wan Kim , Sang-Gug Lee , T.-J. Park , E.-J. Kim Gain mismatch-balanced I/Q down-conversion mixer for UWB. [Citation Graph (0, 0)][DBLP ] Conf ] Taraneh Taghavi , Soheil Ghiasi , Majid Sarrafzadeh Routing algorithms: architecture driven rerouting enhancement for FPGAs. [Citation Graph (0, 0)][DBLP ] Conf ] Francisco Tejada , Andreas G. Andreou Microelectromechanical systems in 3D SOI-CMOS: sensing electronics embedded in mechanical structures. [Citation Graph (0, 0)][DBLP ] Conf ] M. Vemulapalli , Soura Dasgupta , Ashish Pandharipande A new algorithm for optimum bit loading with a general cost. [Citation Graph (0, 0)][DBLP ] Conf ] Alexandre Verle , A. Landrault , Philippe Maurine , Nadine Azémard Circuit sizing method under delay constraint. [Citation Graph (0, 0)][DBLP ] Conf ] G. Konstantopoulos , K. Papathanasiou , A. Samelis Optimization of RF circuits by expert system monitored genetic computation. [Citation Graph (0, 0)][DBLP ] Conf ] A. Kopa , Apsel B. Apsel Common-emitter feedback transimpedance amplifier for analog optical receivers. [Citation Graph (0, 0)][DBLP ] Conf ] G. Krishnamurthy , Maysam Ghovanloo Tongue drive: a tongue operated magnetic sensor based wireless assistive technology for people with severe disabilities. [Citation Graph (0, 0)][DBLP ] Conf ] I-Wei Lai , Tzi-Dar Chiueh One-dimensional interpolation based channel estimation for mobile DVB-H reception. [Citation Graph (0, 0)][DBLP ] Conf ] Noëlle Lewis , Guillaume Monnerie , L. Lewis , Jocelyn Sabatier , Pierre Melchior Automatic procedure generating noise models for discrete-time applications. [Citation Graph (0, 0)][DBLP ] Conf ] Kuan-Yu Lin , T. K. K. Tsang , M. Sawan , M. N. El-Gamal Radio-triggered solar and RF power scavenging and management for ultra low power wireless medical applications. [Citation Graph (0, 0)][DBLP ] Conf ] Claudio Mucci , Massimo Bocchi , Mario Toma , Fabio Campi A case-study on multimedia applications for the XiRisc reconfigurable processor. [Citation Graph (0, 0)][DBLP ] Conf ] S. Ozeri , D. Shmilovitz Static force measurement by piezoelectric sensors. [Citation Graph (0, 0)][DBLP ] Conf ] Kun-Lin Tsai , Ju-Yueh Lee , Shanq-Jang Ruan , Feipei Lai Low power scheduling method using multiple supply voltages. [Citation Graph (0, 0)][DBLP ] Conf ] S. Vatti , C. Papavassiliou New LC oscillator topology in CMOS 0.18µm technology. [Citation Graph (0, 0)][DBLP ] Conf ] Dirk S. Waldhauser , Josef A. Nossek MMSE equalization for bandwidth-efficient multicarrier systems. [Citation Graph (0, 0)][DBLP ] Conf ] Ke Xu , Oliver Chiu-sing Choy , Cheong-fat Chan , Kong-Pong Pun Power-efficient VLSI implementation of bitstream parsing in H.264/AVC decoder. [Citation Graph (0, 0)][DBLP ] Conf ] M. R. Nabavi A 1-V 12-bit switched-op amp pipelined ADC with power optimization. [Citation Graph (0, 0)][DBLP ] Conf ] R. Ondusko , M. Marbacti , R. P. Ramachandran , L. M. Head , M. C. Huggins A vector quantizer classifier for blind signal to noise ratio estimation of speech signals. [Citation Graph (0, 0)][DBLP ] Conf ] Vasilis F. Pavlidis , Eby G. Friedman Via placement for minimum interconnect delay in three-dimensional (3D) circuits. [Citation Graph (0, 0)][DBLP ] Conf ] Andy C. Yu , Heechan Park , Graham R. Martin Fast mesh-based motion estimation employing an embedded block model. [Citation Graph (0, 0)][DBLP ] Conf ] Hashem Zare-Hoseini , Izzet Kale Continuous time delta sigma modulators with reduced clock jitter sensitivity. [Citation Graph (0, 0)][DBLP ] Conf ] Hashem Zare-Hoseini , Omid Shoaei , Izzet Kale A new structure for capacitor-mismatch-insensitive multiply-by-two amplification. [Citation Graph (0, 0)][DBLP ] Conf ] M. Mbaye , D. Lebel , Normand Bélanger , Yvon Savaria , Samuel Pierre Design exploration with an application-specific instruction-set processor for ELA deinterlacing. [Citation Graph (0, 0)][DBLP ] Conf ] Marco Macchetti , Wenyu Chen ASIC hardware implementation of the IDEA NXT encryption algorithm. [Citation Graph (0, 0)][DBLP ] Conf ] F. Xavier Moncunill-Geniz , Pere Palà-Schönwälder Performance of a DSSS superregenerative receiver in the presence of noise and interference. [Citation Graph (0, 0)][DBLP ] Conf ] Gaetano Palumbo , M. Pennisi , Salvatore Pennisi Analysis and evaluation of harmonic distortion in the tunnel diode oscillator. [Citation Graph (0, 0)][DBLP ] Conf ] Zhibin Pan , Koji Kotani , Tadahiro Ohmi Fast encoding method for vector quantization based on sorting elements of codewords to adaptively constructing subvectors. [Citation Graph (0, 0)][DBLP ] Conf ] Lukasz Zielinski , Bartlomiej Puchalski , Jerzy Rutkowski Yield enhancement by means of evolutionary computation techniques. [Citation Graph (0, 0)][DBLP ] Conf ] Julius Georgiou , Andreas G. Andreou , Philippe O. Pouliquen A mixed analog/digital asynchronous processor for cortical computations in 3D SOI-CMOS. [Citation Graph (0, 0)][DBLP ] Conf ] Andrei Vladimirescu , Radu Zlatanovici , Paul G. A. Jespers Analog circuit synthesis using standard EDA tools. [Citation Graph (0, 0)][DBLP ] Conf ] Chua-Chin Wang , Jian-Ming Huang , Chih-Yi Chang , Kuang-Ting Cheng , Chih-Peng Li A 6.57 mW ZigBee transceiver for 868/915 MHz band. [Citation Graph (0, 0)][DBLP ] Conf ] Ting Wu , Un-Ku Moon , Kartikeya Mayaram Dependence of LC VCO oscillation frequency on bias current. [Citation Graph (0, 0)][DBLP ] Conf ] Xiaodong Zhang , Magdy A. Bayoumi A low power adaptive transmitter architecture for low band UWB applications. [Citation Graph (0, 0)][DBLP ] Conf ] Yixuan Zhang , Ce Zhu Distributed video coding based on adaptive binning. [Citation Graph (0, 0)][DBLP ] Conf ] Andreas Wiesbauer , Dietmar Straussnigg , Richard Gaggl , Martin Clara , Luis Hernández , Daniel Gruber Clock jitter compensation for current steering DACs. [Citation Graph (0, 0)][DBLP ] Conf ] S. Abedinpour , B. Bakkaloglu , S. Kiaei A 65MHZ switching rate, two-stage interleaved synchronous buck converter with fully integrated output filter. [Citation Graph (0, 0)][DBLP ] Conf ] Olujide A. Adeniran , Andreas Demosthenous A 19.5mW 1.5V 10-bit pipeline ADC for DVB-H systems in 0.35µm CMOS. [Citation Graph (0, 0)][DBLP ] Conf ] Luciano Volcan Agostini , Roger Porto , José Güntzel , Ivan Saraiva Silva , Sergio Bampi High throughput multitransform and multiparallelism IP for H.264/AVC video compression standard. [Citation Graph (0, 0)][DBLP ] Conf ] Mohammad A. Al-Shyoukh , A. Teutsch A pipelined dual-channel switched capacitor programmable gain amplifier. [Citation Graph (0, 0)][DBLP ] Conf ] David K. Arrowsmith , Mario di Bernardo , Francesco Sorrentino Communication models with distributed transmission rates and buffer sizes. [Citation Graph (0, 0)][DBLP ] Conf ] John V. Arthur , Kwabena Boahen Silicon neurons that inhibit to synchronize. [Citation Graph (0, 0)][DBLP ] Conf ] Alon Ascoli , Orla Feely , Paul F. Curran Modeling the effects of BJT base currents on the dynamics of a log-domain filter. [Citation Graph (0, 0)][DBLP ] Conf ] Boris Axelrod , Yefim Berkovich , Adrian Ioinovici Switched-capacitor (SC)/switched inductor (SL) structures for getting hybrid step-down Cuk/Sepic/Zeta converters. [Citation Graph (0, 0)][DBLP ] Conf ] Alexandros Bartzas , M. Peón , Stylianos Mamagkakis , David Atienza , F. Catthoort , Dimitrios Soudris , M. Mendias Systematic design flow for dynamic data management in visual texture decoder of MPEG-4. [Citation Graph (0, 0)][DBLP ] Conf ] Stephen Bates , Ramkrishna Swamy Parallel encoders for low-density parity-check convolutional codes. [Citation Graph (0, 0)][DBLP ] Conf ] Daniel J. Black , Reid R. Harrison Power, clock, and data recovery in a wireless neural recording device. [Citation Graph (0, 0)][DBLP ] Conf ] Ioan Buciu , Nikos Nikolaidis , Ioannis Pitas On the initialization of the DNMF algorithm. [Citation Graph (0, 0)][DBLP ] Conf ] Francesco Cannillo , Chris Toumazou , Tor Sverre Lande Bit stream processing for Delta-Sigma FM-to-digital converters. [Citation Graph (0, 0)][DBLP ] Conf ] J. Carnes , Un-Ku Moon The effect of switch resistance on pipelined ADC MDAC settling time. [Citation Graph (0, 0)][DBLP ] Conf ] Linga Reddy Cenkeramaddi , Trond Ytterdal Jitter analysis of general charge sampling amplifiers. [Citation Graph (0, 0)][DBLP ] Conf ] S. Chakrabartty CMOS analog iterative decoders using margin propagation circuits. [Citation Graph (0, 0)][DBLP ] Conf ] Tzu-Chiang Chao , Wei Hwang A 1.7mW all digital phase-locked loop with new gain generator and low power DCO. [Citation Graph (0, 0)][DBLP ] Conf ] Hamid Charkhkar , Alireza Asadi , R. Lotfi A 1.8V, 10-bit, 40MS/s MOSFET-only pipeline analog-to-digital converter. [Citation Graph (0, 0)][DBLP ] Conf ] Chih-Ming Chen , Yung-Chang Chen , Chia-Wen Lin Error-resilience transcoding using content-aware intra-refresh based on profit tracing. [Citation Graph (0, 0)][DBLP ] Conf ] Jierong Cheng , Say Wei Foo Markovian level set for echocardiographic image segmentation. [Citation Graph (0, 0)][DBLP ] Conf ] Chao-Chung Cheng , Chun-Wei Ku , Tian-Sheuan Chang A 1280×720 pixels 30 frames/s H.264/MPEG-4 AVC intra encoder. [Citation Graph (0, 0)][DBLP ] Conf ] Jen-Shiun Chiang , Chang-Yo Hsieh , Jin-Chan Liu , Cheng-Chih Chien Concurrent bit-plane coding architecture for EBCOT in JPEG2000. [Citation Graph (0, 0)][DBLP ] Conf ] Zhiqiang Cui , Zhongfeng Wang A 170 Mbps (8176, 7156) quasi-cyclic LDPC decoder implementation with FPGA. [Citation Graph (0, 0)][DBLP ] Conf ] Zhiqiang Cui , Zhongfeng Wang Area-efficient parallel decoder architecture for high rate QC-LDPC codes. [Citation Graph (0, 0)][DBLP ] Conf ] Zih-Yin Ding , Chi-Yun Chen , Tzi-Dar Chiueh Design of a MIMO-OFDM baseband receiver for next-generation wireless LAN. [Citation Graph (0, 0)][DBLP ] Conf ] Rüdiger Ebendt , Rolf Drechsler On the sensitivity of BDDs with respect to path-related objective functions. [Citation Graph (0, 0)][DBLP ] Conf ] P. Gao , Li Chin Khor , Wai Lok Woo , Satnam Singh Dlay Two-stage series-based neural network approach to nonlinear independent component analysis. [Citation Graph (0, 0)][DBLP ] Conf ] Rajesh Garg , Sunil P. Khatri Generalized buffering of PTL logic stages using Boolean division. [Citation Graph (0, 0)][DBLP ] Conf ] Theodoros Giannopoulos , Vassilis Paliouras A novel technique for low-power D/A conversion based on PAPR reduction. [Citation Graph (0, 0)][DBLP ] Conf ] Antonio J. Ginés , Eduardo J. Peralías , Adoración Rueda Statistical analysis of a background correlation-based technique for full calibration of pipeline ADCs. [Citation Graph (0, 0)][DBLP ] Conf ] Tomasz Golonek , Damian Grzechca , Jerzy Rutkowski Application of genetic programming to edge detector design. [Citation Graph (0, 0)][DBLP ] Conf ] Nikhil Gupta , M. N. S. Swamy , Eugene I. Plotkin Video noise reduction in the wavelet domain using temporal decorrelation and adaptive thresholding. [Citation Graph (0, 0)][DBLP ] Conf ] David G. Haigh Analytic approach to or transformations for FET circuit synthesis. Part I. Nullator-norator tree transformations. [Citation Graph (0, 0)][DBLP ] Conf ] Takao Hinamoto , Osemekhian I. Omoifo , Wu-Sheng Lu Realization of MIMO linear discrete-time systems with minimum L2 -sensitivity and no overflow oscillations. [Citation Graph (0, 0)][DBLP ] Conf ] Zhangcai Huang , Y. Inoue , Quan Zhang , Yuehu Zhou , Long Xie , H. Ogai Behavioral macromodeling of analog LSI implementation for automobile intake system. [Citation Graph (0, 0)][DBLP ] Conf ] Shu-Chuan Huang , Min-Hsiung Liao , Chih-Sheng Hsu A low-distortion fourth-order bandpass delta-sigma modulator. [Citation Graph (0, 0)][DBLP ] Conf ] T. Iida , Y. Nomura , Jianming Lu , Hiroo Sekiya , Takashi Yahagi Blind dereverberation using correlation coefficients considering periodicity of voiced speech. [Citation Graph (0, 0)][DBLP ] Conf ] T. Israeli , I. Levin , D. Shmilovitz , S. Singer AC-DC converters with bi-directional power flow and some possible applications. [Citation Graph (0, 0)][DBLP ] Conf ] Wen-Chung Kao , Ying-Ju Chen , Chia-Ping Shen , Chi-Wu Huang , Sheng-Yuan Lin Integrating edge detector and bilateral noise filter for enhancing color images. [Citation Graph (0, 0)][DBLP ] Conf ] Wen-Chung Kao , Sheng-Hong Wang , Chih-Chung Kao , Chi-Wu Huang , Sheng-Yuan Lin Color reproduction for digital imaging systems. [Citation Graph (0, 0)][DBLP ] Conf ] Lih-Jen Kau , Yuan-Pei Lin Least squares-based lossless image coding with edge-look-ahead. [Citation Graph (0, 0)][DBLP ] Conf ] M. S. Khan , N. Yanduru Analysis of self mixing of transmitter interference in WCDMA receivers. [Citation Graph (0, 0)][DBLP ] Conf ] Simon Kristiansson , Fredrik Ingvarson , Kjell O. Jeppson Properties and modeling of ground structures for reducing substrate noise coupling in ICs. [Citation Graph (0, 0)][DBLP ] Conf ] Teahyung Lee , D. Anderson Performance analysis of a correlation-based optical flow algorithm under noisy environments. [Citation Graph (0, 0)][DBLP ] Conf ] K. Honda , Masanori Furuta , Shoji Kawahito A 1V 10b 125MSample/s A/D Converter Using Cascade Amp-Sharing and Capacitance Coupling Techniues. [Citation Graph (0, 0)][DBLP ] Conf ] P. Mercier , Behrouz Nowrouzian A Genetic Algorithm for the Design and Optimization of FRM Digital Filters Over a Canonical Double-Base Multiplier Coefficient Space. [Citation Graph (0, 0)][DBLP ] Conf ] Thiago Teixeira , Eugenio Culurciello , Andreas G. Andreou An Address-Event Image Sensor Network. [Citation Graph (0, 0)][DBLP ] Conf ] K. Nakada , Jun Igarashi , A. Tetsuya , H. Hayashi Noise Effects on Performance of Signal Detection in an Analog VLSI Resonate-And Fire Neuron. [Citation Graph (0, 0)][DBLP ] Conf ] 