Conferences in DBLP
Dietmar Fey , Daniel Schmidt Marching-pixels: a new organic computing paradigm for smart sensor processor arrays. [Citation Graph (0, 0)][DBLP ] Conf ] Thorsten Schöler , Christian Müller-Schloer First steps towards organic computing systems: monitoring an adaptive protocol stack with a fuzzy classifier system. [Citation Graph (0, 0)][DBLP ] Conf ] Amirali Baniasadi Balancing clustering-induced stalls to improve performance in clustered processors. [Citation Graph (0, 0)][DBLP ] Conf ] John Feo , David Harper , Simon Kahan , Petr Konecny ELDORADO. [Citation Graph (0, 0)][DBLP ] Conf ] Alexis De Vos , Yvan Van Rentergem Reversible computing: from mathematical group theory to electronical circuit experiment. [Citation Graph (0, 0)][DBLP ] Conf ] Daniel B. Miller , Edward Fredkin Two-state, reversible, universal cellular automata in three dimensions. [Citation Graph (0, 0)][DBLP ] Conf ] Tommaso Toffoli , Lev B. Levitin Specific ergodicity: an informative indicator for invertible computational media. [Citation Graph (0, 0)][DBLP ] Conf ] Niklas Therning , Lars Bengtsson Jalapeno: secentralized grid computing using peer-to-peer technology. [Citation Graph (0, 0)][DBLP ] Conf ] Li Chunlin , Li Layuan A two level market model for resource allocation optimization in computational grid. [Citation Graph (0, 0)][DBLP ] Conf ] Humberto Calderon , Stamatis Vassiliadis Reconfigurable universal SAD-multiplier array. [Citation Graph (0, 0)][DBLP ] Conf ] Martin Thuresson , Per Stenström Evaluation of extended dictionary-based static code compression schemes. [Citation Graph (0, 0)][DBLP ] Conf ] Cécile Germain-Renaud , Dephine Monnier-Ragaigne Grid result checking. [Citation Graph (0, 0)][DBLP ] Conf ] Kurt Maly , Mohammad Zubair , Vamshi Chilukamarri , Pratik Kothari GRID Based Federated Digital Library. [Citation Graph (0, 0)][DBLP ] Conf ] João M. P. Cardoso Dynamic loop pipelining in data-driven architectures. [Citation Graph (0, 0)][DBLP ] Conf ] Martin Schulz , Brian S. White , Sally A. McKee , Hsien-Hsin S. Lee , Jürgen Jeitner Owl: next generation system monitoring. [Citation Graph (0, 0)][DBLP ] Conf ] Valentina Salapura , Randy Bickford , Matthias A. Blumrich , Arthur A. Bright , Dong Chen , Paul Coteus , Alan Gara , Mark Giampapa , Michael Gschwind , Manish Gupta , Shawn Hall , Ruud A. Haring , Philip Heidelberger , Dirk Hoenicke , Gerard V. Kopcsay , Martin Ohmacht , Rick A. Rand , Todd Takken , Pavlos Vranas Power and performance optimization at the system level. [Citation Graph (0, 0)][DBLP ] Conf ] Mihai Udrescu , Lucian Prodan , Mircea Vladutiu Improving quantum circuit dependability with reconfigurable quantum gate arrays. [Citation Graph (0, 0)][DBLP ] Conf ] Claudia Roberta Calidonna , Adele Naddeo Using a hybrid CA based model for a flexible qualitative qubit simulation: fully frustrated josephson junction ladder (JJL) application. [Citation Graph (0, 0)][DBLP ] Conf ] Mathias Spjuth , Martin Karlsson , Erik Hagersten Skewed caches from a low-power perspective. [Citation Graph (0, 0)][DBLP ] Conf ] Nasir Mohyuddin , Rashed Bhatti , Michel Dubois Controlling leakage power with the replacement policy in slumberous caches. [Citation Graph (0, 0)][DBLP ] Conf ] Asadollah Shahbahrami , Ben H. H. Juurlink , Stamatis Vassiliadis Matrix register file and extended subwords: two techniques for embedded media processors. [Citation Graph (0, 0)][DBLP ] Conf ] Masayo Haneda , Peter M. W. Knijnenburg , Harry A. G. Wijshoff Optimizing general purpose compiler optimization. [Citation Graph (0, 0)][DBLP ] Conf ] K. Ananda Vardhan , Y. N. Srikant Transition aware scheduling: increasing continuous idle-periods in resource units. [Citation Graph (0, 0)][DBLP ] Conf ] Soraya Ghiasi , Tom W. Keller , Freeman L. Rawson III Scheduling for heterogeneous processors in server systems. [Citation Graph (0, 0)][DBLP ] Conf ] Tipp Moseley , Alex Shye , Vijay Janapa Reddi , Matthew Iyer , Dan Fay , David Hodgdon , Joshua L. Kihm , Alex Settle , Dirk Grunwald , Daniel A. Connors Dynamic run-time architecture techniques for enabling continuous optimization. [Citation Graph (0, 0)][DBLP ] Conf ] Alberto Ferrante , Vincenzo Piuri , Fabien Castanier A QoS-enabled packet scheduling algorithm for IPSec multi-accelerator based systems. [Citation Graph (0, 0)][DBLP ] Conf ] Malik Silva Sparse matrix storage revisited. [Citation Graph (0, 0)][DBLP ] Conf ] Venu K. Murthy , E. V. Krishnamurthy Contextual information management using contract: based workflow. [Citation Graph (0, 0)][DBLP ] Conf ] Faruk Bagci , Holger Schick , Jan Petzold , Wolfgang Trumler , Theo Ungerer Communication and security extensions for a ubiquitous mobile agent system (UbiMAS). [Citation Graph (0, 0)][DBLP ] Conf ] Steve Carr , Soner Önder A case for a working-set-based memory hierarchy. [Citation Graph (0, 0)][DBLP ] Conf ] Jarek Nieplocha , Manojkumar Krishnan , Bruce Palmer , Vinod Tipparaju , Yeliang Zhang Exploiting processor groups to extend scalability of the GA shared memory programming model. [Citation Graph (0, 0)][DBLP ] Conf ] Edward Fredkin A computing architecture for physics. [Citation Graph (0, 0)][DBLP ] Conf ] Jörg Platte , Edwin Naroska A combined hardware and software architecture for secure computing. [Citation Graph (0, 0)][DBLP ] Conf ] Fredrik Warg , Per Stenström Reducing misspeculation overhead for module-level speculative execution. [Citation Graph (0, 0)][DBLP ] Conf ] Braxton Thomason , Craig Chase Partially ordered epochs for thread-level speculation. [Citation Graph (0, 0)][DBLP ] Conf ] Christine Rochange , Pascal Sainrat A time-predictable execution mode for superscalar pipelines with instruction prescheduling. [Citation Graph (0, 0)][DBLP ] Conf ] Lambert Schaelicke , Kyle Wheeler , Curt Freeland SPANIDS: a scalable network intrusion detection loadbalancer. [Citation Graph (0, 0)][DBLP ] Conf ] Lucian Prodan , Mihai Udrescu , Mircea Vladutiu Reliability assessment in embryonics inspired by fault-tolerant quantum computation. [Citation Graph (0, 0)][DBLP ] Conf ] Chunrong Lai , Shih-Lien Lu , Yurong Chen , Trista Chen Improving branch prediction accuracy with parallel conservative correctors. [Citation Graph (0, 0)][DBLP ] Conf ] Thomas R. Puzak , Allan Hartstein , Philip G. Emma , Viji Srinivasan When prefetching improves/degrades performance. [Citation Graph (0, 0)][DBLP ] Conf ] Kuo-Su Hsiao , Chung-Ho Chen An efficient wakeup design for energy reduction in high-performance superscalar processors. [Citation Graph (0, 0)][DBLP ] Conf ] Nana B. Sam , Martin Burtscher On the energy-efficiency of speculative hardware. [Citation Graph (0, 0)][DBLP ] Conf ] Salvador Petit , Julio Sahuquillo , Jose M. Such , David R. Kaeli Exploiting temporal locality in drowsy cache policies. [Citation Graph (0, 0)][DBLP ] Conf ] Michael J. Geiger , Sally A. McKee , Gary S. Tyson Drowsy region-based caches: minimizing both dynamic and static power dissipation. [Citation Graph (0, 0)][DBLP ] Conf ] Michael P. Frank Introduction to reversible computing: motivation, progress, and challenges. [Citation Graph (0, 0)][DBLP ] Conf ] Erik DeBenedictis Reversible logic for supercomputing. [Citation Graph (0, 0)][DBLP ] Conf ] Craig S. Lent , Sarah E. Frost , Peter M. Kogge Reversible computation with quantum-dot cellular automata (QCA). [Citation Graph (0, 0)][DBLP ] Conf ] Erik Forsberg The electron waveguide y-branch switch: a review and arguments for its use as a base for reversible logic. [Citation Graph (0, 0)][DBLP ] Conf ] Visvesh S. Sathe , Juang-Ying Chueh , Joohee Kim , Conrad H. Ziesler , Suhwan Kim , Marios C. Papaefthymiou Fast, efficient, recovering, and irreversible. [Citation Graph (0, 0)][DBLP ] Conf ] Stephan Henzler , Thomas Nirschl , Matthias Eireiner , Ettore Amirante , Doris Schmitt-Landsiedel Making adiabatic circuits attractive for todays VLSI industry by multi-mode operation-adiabatic mode circuits. [Citation Graph (0, 0)][DBLP ] Conf ] Seokkee Kim , Soo-Ik Chae Implementation of a simple 8-bit microprocessor with reversible energy recovery logic. [Citation Graph (0, 0)][DBLP ] Conf ] Jürgen Fischer , Philip Teichmann , Doris Schmitt-Landsiedel Scaling trends in adiabatic logic. [Citation Graph (0, 0)][DBLP ] Conf ] Paul M. B. Vitányi Time, space, and energy in reversible computing. [Citation Graph (0, 0)][DBLP ] Conf ] Lev B. Levitin , Tommaso Toffoli Thermodynamical cost of reversible computing. [Citation Graph (0, 0)][DBLP ] Conf ] 