Conferences in DBLP
Ian Buck GPU Computing: Programming a Massively Parallel Processor. [Citation Graph (0, 0)][DBLP ] Conf ] Jesse Fang Parallel Programming Environment: A Key to Translating Tera-Scale Platforms into a Big Success. [Citation Graph (0, 0)][DBLP ] Conf ] David Dice , Nir Shavit Understanding Tradeoffs in Software Transactional Memory. [Citation Graph (0, 0)][DBLP ] Conf ] Cheng Wang , Wei-Yu Chen , Youfeng Wu , Bratin Saha , Ali-Reza Adl-Tabatabai Code Generation and Optimization for Transactional Memory Constructs in an Unmanaged Language. [Citation Graph (0, 0)][DBLP ] Conf ] Thomas Kotzmann , Hanspeter Mössenböck Run-Time Support for Optimizations Based on Escape Analysis. [Citation Graph (0, 0)][DBLP ] Conf ] Jason Hiser , Daniel Williams , Wei Hu , Jack W. Davidson , Jason Mars , Bruce R. Childers Evaluating Indirect Branch Handling Mechanisms in Software Dynamic Translation Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Vijay Janapa Reddi , Dan Connors , Robert Cohn , Michael D. Smith Persistent Code Caching: Exploiting Code Reuse Across Executions and Applications. [Citation Graph (0, 0)][DBLP ] Conf ] Josep M. Codina , F. Jesús Sánchez , Antonio González Virtual Cluster Scheduling Through the Scheduling Graph. [Citation Graph (0, 0)][DBLP ] Conf ] Florent Bouchez , Alain Darte , Fabrice Rastello On the Complexity of Register Coalescing. [Citation Graph (0, 0)][DBLP ] Conf ] Neil Birkbeck , Jonathan Levesque , José Nelson Amaral A Dimension Abstraction Approach to Vectorization in Matlab. [Citation Graph (0, 0)][DBLP ] Conf ] Kapil Vaswani , Matthew J. Thazhuthaveetil , Y. N. Srikant , P. J. Joseph Microarchitecture Sensitive Empirical Models for Compiler Optimizations. [Citation Graph (0, 0)][DBLP ] Conf ] Louis-Noël Pouchet , Cédric Bastoul , Albert Cohen , Nicolas Vasilache Iterative Optimization in the Polyhedral Model: Part I, One-Dimensional Time. [Citation Graph (0, 0)][DBLP ] Conf ] Prasad Kulkarni , David B. Whalley , Gary S. Tyson Evaluating Heuristic Optimization Phase Order Search Algorithms. [Citation Graph (0, 0)][DBLP ] Conf ] Denis Barthou , Sébastien Donadio , Patrick Carribault , Alexandre Duchateau , William Jalby Loop Optimization using Hierarchical Compilation and Kernel Decomposition. [Citation Graph (0, 0)][DBLP ] Conf ] John Cavazos , Grigori Fursin , Felix V. Agakov , Edwin V. Bonilla , Michael F. P. O'Boyle , Olivier Temam Rapidly Selecting Good Compiler Optimizations using Performance Counters. [Citation Graph (0, 0)][DBLP ] Conf ] Tipp Moseley , Alex Shye , Vijay Janapa Reddi , Dirk Grunwald , Ramesh Peri Shadow Profiling: Hiding Instrumentation Costs with Parallelism. [Citation Graph (0, 0)][DBLP ] Conf ] Steven Wallace , Kim M. Hazelwood SuperPin: Parallelizing Dynamic Instrumentation for Real-Time Performance. [Citation Graph (0, 0)][DBLP ] Conf ] Mike Fulton , Mark G. Stoodley Compilation Techniques for Real-Time Java Programs. [Citation Graph (0, 0)][DBLP ] Conf ] Ozcan Ozturk , Guilin Chen , Mahmut T. Kandemir , Mustafa Karaköy Compiler-Directed Variable Latency Aware SPM Management to CopeWith Timing Problems. [Citation Graph (0, 0)][DBLP ] Conf ] Cheng Wang , Ho-Seop Kim , Youfeng Wu , Victor Ying Compiler-Managed Software-based Redundant Multi-Threading for Transient Fault Detection. [Citation Graph (0, 0)][DBLP ] Conf ] A. Dreweke , Marc Wörlein , Ingrid Fischer , D. Schell , Thorsten Meinl , Michael Philippsen Graph-Based Procedural Abstraction. [Citation Graph (0, 0)][DBLP ] Conf ] Easwaran Raman , Robert Hundt , Sandya Mannarswamy Structure Layout Optimization for Multithreaded Programs. [Citation Graph (0, 0)][DBLP ] Conf ] Haifeng He , John Trimble , Somu Perianayagam , Saumya K. Debray , Gregory Andrews Code Compaction of an Operating System Kernel. [Citation Graph (0, 0)][DBLP ] Conf ] Qin Zhao , Rodric M. Rabbah , Saman P. Amarasinghe , Larry Rudolph , Weng-Fai Wong Ubiquitous Memory Introspection. [Citation Graph (0, 0)][DBLP ] Conf ] Jinquan Dai , Long Li , Bo Huang Pipelined Execution of Critical Sections Using Software-Controlled Caching in Network Processors. [Citation Graph (0, 0)][DBLP ] Conf ] Chris Grzegorczyk , Sunil Soman , Chandra Krintz , Richard Wolski Isla Vista Heap Sizing: Using Feedback to Avoid Paging. [Citation Graph (0, 0)][DBLP ] Conf ] Amir Hormati , Nathan Clark , Scott A. Mahlke Exploiting Narrow Accelerators with Data-Centric Subgraph Mapping. [Citation Graph (0, 0)][DBLP ] Conf ] Alex Aletà , Josep M. Codina , Antonio González , David R. Kaeli Heterogeneous Clustered VLIW Microarchitectures. [Citation Graph (0, 0)][DBLP ] Conf ] Hyesoon Kim , José A. Joao , Onur Mutlu , Yale N. Patt Profile-assisted Compiler Support for Dynamic Predication in Diverge-Merge Processors. [Citation Graph (0, 0)][DBLP ] Conf ] 