Conferences in DBLP
Forrest H. Bennett III , John R. Koza , Jessen Yu , William Mydlowec Automatic Synthesis, Placement, and Routing of an Amplifier Circuit by Means of Genetic Programming. [Citation Graph (0, 0)][DBLP ] ICES, 2000, pp:1-10 [Conf ] D. W. Bradley , Andrew M. Tyrrell Immunotronics: Hardware Fault Tolerance Inspired by the Immune System. [Citation Graph (0, 0)][DBLP ] ICES, 2000, pp:11-20 [Conf ] Carlos A. Coello Coello , Rosa Laura Zavala Gutierrez , Benito Mendoza García , Arturo Hernández Aguirre Ant Colony System for the Design of Combinational Logic Circuits. [Citation Graph (0, 0)][DBLP ] ICES, 2000, pp:21-30 [Conf ] Fulvio Corno , Matteo Sonza Reorda , Giovanni Squillero Evolving Cellular Automata for Self-Testing Hardware. [Citation Graph (0, 0)][DBLP ] ICES, 2000, pp:31-40 [Conf ] Ernesto Damiani , Valentino Liberali , Andrea Tettamanzi Dynamic Optimisation of Non-linear Feed Forward Circuits. [Citation Graph (0, 0)][DBLP ] ICES, 2000, pp:41-50 [Conf ] Ernest J. P. Earon , Tim D. Barfoot , Gabriele M. T. D'Eleuterio From the Sea to the Sidewalk: The Evolution of Hexapod Walking Gaits by a Genetic Algorithm. [Citation Graph (0, 0)][DBLP ] ICES, 2000, pp:51-60 [Conf ] Alister Hamilton , Peter Thomson , Morgan Tamplin Experiments in Evolvable Filter Design Using Pulse Based Programmable Analogue VLSI Models. [Citation Graph (0, 0)][DBLP ] ICES, 2000, pp:61-71 [Conf ] Gordon Hollingworth , Steve Smith , Andy Tyrell The Intrinsic Evolution of Virtex Devices Through Internet Reconfigurable Logic. [Citation Graph (0, 0)][DBLP ] ICES, 2000, pp:72-79 [Conf ] Gregory Hornby , Seiichi Takamura , Osamu Hanagata , Masahiro Fujita , Jordan B. Pollack Evolution of Controllers from a High-Level Simulator to a High DOF Robot. [Citation Graph (0, 0)][DBLP ] ICES, 2000, pp:80-89 [Conf ] Francisco Jiménez-Morales The Evolution of 3-d C. A. to Perform a Collective Behaviour Task. [Citation Graph (0, 0)][DBLP ] ICES, 2000, pp:90-102 [Conf ] Yuji Kasai , Hidenori Sakanashi , Masahiro Murakawa , Shogo Kiryu , Neil Marston , Tetsuya Higuchi Initial Evaluation of an Evolvable Microwave Circuit. [Citation Graph (0, 0)][DBLP ] ICES, 2000, pp:103-112 [Conf ] DaeEun Kim , Jose M. Carmena , John Hallam Towards an Artificial Pinna for a Narrow-Band Biomimetic Sonarhead. [Citation Graph (0, 0)][DBLP ] ICES, 2000, pp:113-122 [Conf ] Jörg Langeheine , Simon Fölling , Karlheinz Meier , Johannes Schemmel Towards a Silicon Primordial Soup: A Fast Approach to Hardware Evolution with a VLSI Transistor Array. [Citation Graph (0, 0)][DBLP ] ICES, 2000, pp:123-132 [Conf ] Paul J. Layzell , Adrian Thompson Understanding Inherent Qualities of Evolved Circuits: Evolutionary History as a Predictor of Fault Tolerance. [Citation Graph (0, 0)][DBLP ] ICES, 2000, pp:133-144 [Conf ] Philippe Millet , Jean-Claude Heudin Comparison between Three Heuristic Algorithms to Repair a Large-Scale MIMD Computer. [Citation Graph (0, 0)][DBLP ] ICES, 2000, pp:145-154 [Conf ] Cesar Ortega-Sanchez , Andrew M. Tyrrell A Hardware Implementation of an Embryonic Architecture Using Virtex FPGAs. [Citation Graph (0, 0)][DBLP ] ICES, 2000, pp:155-164 [Conf ] Simon Perkins , Reid B. Porter , Neal R. Harvey Everything on the Chip: A Hardware-Based Self-Contained Spatially-Structured Genetic Algorithm for Signal Processing. [Citation Graph (0, 0)][DBLP ] ICES, 2000, pp:165-174 [Conf ] Jordan B. Pollack , Hod Lipson , Sevan Ficci , Pablo Funes , Gregory Hornby , Richard A. Watson Evolutionary Techniques in Physical Robotics. [Citation Graph (0, 0)][DBLP ] ICES, 2000, pp:175-186 [Conf ] Lucian Prodan , Gianluca Tempesti , Daniel Mange , André Stauffer Biology Meets Electronics: The Path to a Bio-inspired FPGA. [Citation Graph (0, 0)][DBLP ] ICES, 2000, pp:187-196 [Conf ] Craig Slorach , Ken Sharman The Design and Implementation of Custom Architectures for Evolvable Hardware Using Off-the-Shelf Programmable Devices. [Citation Graph (0, 0)][DBLP ] ICES, 2000, pp:197-207 [Conf ] Adrian Stoica , Ricardo Salem Zebulum , Didier Keymeulen Mixtrinsic Evolution. [Citation Graph (0, 0)][DBLP ] ICES, 2000, pp:208-217 [Conf ] Adrian Thompson , Paul J. Layzell Evolution of Robustness in an Electronics Design. [Citation Graph (0, 0)][DBLP ] ICES, 2000, pp:218-228 [Conf ] Peter Thomson Circuit Evolution and Visualisation. [Citation Graph (0, 0)][DBLP ] ICES, 2000, pp:229-240 [Conf ] Joseba Urzelai , Dario Floreano Evolutionary Robots with Fast Adaptive Behaviour in New Environments. [Citation Graph (0, 0)][DBLP ] ICES, 2000, pp:241-251 [Conf ] Vesselin K. Vassilev , Julian F. Miller The Advantages of Landscape Neutrality in Digital Circuit Evolution. [Citation Graph (0, 0)][DBLP ] ICES, 2000, pp:252-263 [Conf ] Moritoshi Yasunaga , Taro Nakamura , Ikuo Yoshihara , Jung Hwan Kim Genetic Algorithm-Based Methodology for Pattern Recognition Hardware. [Citation Graph (0, 0)][DBLP ] ICES, 2000, pp:264-273 [Conf ] Ricardo Salem Zebulum , Adrian Stoica , Didier Keymeulen A Flexible Model of a CMOS Field Programmable Transistor Array Targeted for Hardware Evolution. [Citation Graph (0, 0)][DBLP ] ICES, 2000, pp:274-283 [Conf ]