The SCEAS System
Navigation Menu

Conferences in DBLP

International Conference on Evolvable Systems (ICES) (ices)
2000 (conf/ices/2000)

  1. Forrest H. Bennett III, John R. Koza, Jessen Yu, William Mydlowec
    Automatic Synthesis, Placement, and Routing of an Amplifier Circuit by Means of Genetic Programming. [Citation Graph (0, 0)][DBLP]
    ICES, 2000, pp:1-10 [Conf]
  2. D. W. Bradley, Andrew M. Tyrrell
    Immunotronics: Hardware Fault Tolerance Inspired by the Immune System. [Citation Graph (0, 0)][DBLP]
    ICES, 2000, pp:11-20 [Conf]
  3. Carlos A. Coello Coello, Rosa Laura Zavala Gutierrez, Benito Mendoza García, Arturo Hernández Aguirre
    Ant Colony System for the Design of Combinational Logic Circuits. [Citation Graph (0, 0)][DBLP]
    ICES, 2000, pp:21-30 [Conf]
  4. Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
    Evolving Cellular Automata for Self-Testing Hardware. [Citation Graph (0, 0)][DBLP]
    ICES, 2000, pp:31-40 [Conf]
  5. Ernesto Damiani, Valentino Liberali, Andrea Tettamanzi
    Dynamic Optimisation of Non-linear Feed Forward Circuits. [Citation Graph (0, 0)][DBLP]
    ICES, 2000, pp:41-50 [Conf]
  6. Ernest J. P. Earon, Tim D. Barfoot, Gabriele M. T. D'Eleuterio
    From the Sea to the Sidewalk: The Evolution of Hexapod Walking Gaits by a Genetic Algorithm. [Citation Graph (0, 0)][DBLP]
    ICES, 2000, pp:51-60 [Conf]
  7. Alister Hamilton, Peter Thomson, Morgan Tamplin
    Experiments in Evolvable Filter Design Using Pulse Based Programmable Analogue VLSI Models. [Citation Graph (0, 0)][DBLP]
    ICES, 2000, pp:61-71 [Conf]
  8. Gordon Hollingworth, Steve Smith, Andy Tyrell
    The Intrinsic Evolution of Virtex Devices Through Internet Reconfigurable Logic. [Citation Graph (0, 0)][DBLP]
    ICES, 2000, pp:72-79 [Conf]
  9. Gregory Hornby, Seiichi Takamura, Osamu Hanagata, Masahiro Fujita, Jordan B. Pollack
    Evolution of Controllers from a High-Level Simulator to a High DOF Robot. [Citation Graph (0, 0)][DBLP]
    ICES, 2000, pp:80-89 [Conf]
  10. Francisco Jiménez-Morales
    The Evolution of 3-d C. A. to Perform a Collective Behaviour Task. [Citation Graph (0, 0)][DBLP]
    ICES, 2000, pp:90-102 [Conf]
  11. Yuji Kasai, Hidenori Sakanashi, Masahiro Murakawa, Shogo Kiryu, Neil Marston, Tetsuya Higuchi
    Initial Evaluation of an Evolvable Microwave Circuit. [Citation Graph (0, 0)][DBLP]
    ICES, 2000, pp:103-112 [Conf]
  12. DaeEun Kim, Jose M. Carmena, John Hallam
    Towards an Artificial Pinna for a Narrow-Band Biomimetic Sonarhead. [Citation Graph (0, 0)][DBLP]
    ICES, 2000, pp:113-122 [Conf]
  13. Jörg Langeheine, Simon Fölling, Karlheinz Meier, Johannes Schemmel
    Towards a Silicon Primordial Soup: A Fast Approach to Hardware Evolution with a VLSI Transistor Array. [Citation Graph (0, 0)][DBLP]
    ICES, 2000, pp:123-132 [Conf]
  14. Paul J. Layzell, Adrian Thompson
    Understanding Inherent Qualities of Evolved Circuits: Evolutionary History as a Predictor of Fault Tolerance. [Citation Graph (0, 0)][DBLP]
    ICES, 2000, pp:133-144 [Conf]
  15. Philippe Millet, Jean-Claude Heudin
    Comparison between Three Heuristic Algorithms to Repair a Large-Scale MIMD Computer. [Citation Graph (0, 0)][DBLP]
    ICES, 2000, pp:145-154 [Conf]
  16. Cesar Ortega-Sanchez, Andrew M. Tyrrell
    A Hardware Implementation of an Embryonic Architecture Using Virtex FPGAs. [Citation Graph (0, 0)][DBLP]
    ICES, 2000, pp:155-164 [Conf]
  17. Simon Perkins, Reid B. Porter, Neal R. Harvey
    Everything on the Chip: A Hardware-Based Self-Contained Spatially-Structured Genetic Algorithm for Signal Processing. [Citation Graph (0, 0)][DBLP]
    ICES, 2000, pp:165-174 [Conf]
  18. Jordan B. Pollack, Hod Lipson, Sevan Ficci, Pablo Funes, Gregory Hornby, Richard A. Watson
    Evolutionary Techniques in Physical Robotics. [Citation Graph (0, 0)][DBLP]
    ICES, 2000, pp:175-186 [Conf]
  19. Lucian Prodan, Gianluca Tempesti, Daniel Mange, André Stauffer
    Biology Meets Electronics: The Path to a Bio-inspired FPGA. [Citation Graph (0, 0)][DBLP]
    ICES, 2000, pp:187-196 [Conf]
  20. Craig Slorach, Ken Sharman
    The Design and Implementation of Custom Architectures for Evolvable Hardware Using Off-the-Shelf Programmable Devices. [Citation Graph (0, 0)][DBLP]
    ICES, 2000, pp:197-207 [Conf]
  21. Adrian Stoica, Ricardo Salem Zebulum, Didier Keymeulen
    Mixtrinsic Evolution. [Citation Graph (0, 0)][DBLP]
    ICES, 2000, pp:208-217 [Conf]
  22. Adrian Thompson, Paul J. Layzell
    Evolution of Robustness in an Electronics Design. [Citation Graph (0, 0)][DBLP]
    ICES, 2000, pp:218-228 [Conf]
  23. Peter Thomson
    Circuit Evolution and Visualisation. [Citation Graph (0, 0)][DBLP]
    ICES, 2000, pp:229-240 [Conf]
  24. Joseba Urzelai, Dario Floreano
    Evolutionary Robots with Fast Adaptive Behaviour in New Environments. [Citation Graph (0, 0)][DBLP]
    ICES, 2000, pp:241-251 [Conf]
  25. Vesselin K. Vassilev, Julian F. Miller
    The Advantages of Landscape Neutrality in Digital Circuit Evolution. [Citation Graph (0, 0)][DBLP]
    ICES, 2000, pp:252-263 [Conf]
  26. Moritoshi Yasunaga, Taro Nakamura, Ikuo Yoshihara, Jung Hwan Kim
    Genetic Algorithm-Based Methodology for Pattern Recognition Hardware. [Citation Graph (0, 0)][DBLP]
    ICES, 2000, pp:264-273 [Conf]
  27. Ricardo Salem Zebulum, Adrian Stoica, Didier Keymeulen
    A Flexible Model of a CMOS Field Programmable Transistor Array Targeted for Hardware Evolution. [Citation Graph (0, 0)][DBLP]
    ICES, 2000, pp:274-283 [Conf]
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002