Conferences in DBLP
Markus Hegland , Michael R. Osborne Algorithms for Block Bidiagonal Systems on Vector and Parallel Computers. [Citation Graph (0, 0)][DBLP ] Conf ] Peter Christen A Parallel Iterative Linear System Solver with Dynamic Load Balancing. [Citation Graph (0, 0)][DBLP ] Conf ] Richard P. Brent , L. Grosz , David L. Harrar II , Markus Hegland , M. Kahn , G. Keating , G. Mercer , Ole Møller Nielsen , Michael R. Osborne , Bing Bing Zhou , M. Nakanishi Development of a Mathematical Subroutine Library for Fujitsu Vector Parallel Processors. [Citation Graph (0, 0)][DBLP ] Conf ] José González , Antonio González The Potential of Data Value Speculation to Boost ILP. [Citation Graph (0, 0)][DBLP ] Conf ] Bryan Black , Brian Mueller , Stephanie Postal , Ryan Rakvic , Noppanunt Utamaphethai , John Paul Shen Load Execution Latency Reduction. [Citation Graph (0, 0)][DBLP ] Conf ] Luis Villa , Roger Espasa , Mateo Valero A Performance Study of Out-of-order Vector Architectures and Short Registers. [Citation Graph (0, 0)][DBLP ] Conf ] Rong-Guey Chang , Tyng-Ruey Chuang , Jenq Kuen Lee Efficient Support of Parallel Sparse Computation for Array Intrinsic Functions of Fortran 90. [Citation Graph (0, 0)][DBLP ] Conf ] David Koufaty , Josep Torrellas Comparing Data Forwarding and Prefetching for Communication-induced Misses in Shared-memory MPs. [Citation Graph (0, 0)][DBLP ] Conf ] Dhruva R. Chakrabarti , Nagaraj Shenoy , Alok N. Choudhary , Prithviraj Banerjee An Efficient Uniform Run-time Scheme for Mixed Regular-irregular Applications. [Citation Graph (0, 0)][DBLP ] Conf ] Mahmut T. Kandemir , Alok N. Choudhary , Nagaraj Shenoy , Prithviraj Banerjee , J. Ramanujam A Hyperplane Based Approach for Optimizing Spatial Locality in Loop Nests. [Citation Graph (0, 0)][DBLP ] Conf ] Pedro Marcuello , Antonio González , Jordi Tubella Speculative Multithreaded Processors. [Citation Graph (0, 0)][DBLP ] Conf ] Venkata Krishnan , Josep Torrellas Hardware and Software Support for Speculative Execution of Sequential Binaries on a Chip-multiprocessor. [Citation Graph (0, 0)][DBLP ] Conf ] Iffat H. Kazi , David J. Lilja Coarse-grained Speculative Execution in Shared-memory Multiprocessors. [Citation Graph (0, 0)][DBLP ] Conf ] Pritpal S. Ahuja , Kevin Skadron , Margaret Martonosi , Douglas W. Clark Multipath Execution: Opportunities and Limits. [Citation Graph (0, 0)][DBLP ] Conf ] Siegfried Benkner , Piyush Mehrotra , John Van Rosendale , Hans P. Zima High-level Management of Communication Schedules in HPF-like Languages. [Citation Graph (0, 0)][DBLP ] Conf ] Thomas Fahringer , Eduard Mehofer Problem and Machine Sensitive Communication Optimization. [Citation Graph (0, 0)][DBLP ] Conf ] Gerald Roth , Ken Kennedy Loop Fusion in High Performance Fortran. [Citation Graph (0, 0)][DBLP ] Conf ] Marta Jiménez , José M. Llabería , Agustin Fernández , Enric Morancho A General Algorithm for Tiling the Register Level. [Citation Graph (0, 0)][DBLP ] Conf ] Neil T. Spring , Richard Wolski Application Level Scheduling of Gene Sequence Comparison on Metacomputers. [Citation Graph (0, 0)][DBLP ] Conf ] Toshiya Kimura , Hiroshi Takemiya Local Area Metacomputing for Multidisciplinary Problems: A Case Study for Fluid/Structure Coupled Simulation. [Citation Graph (0, 0)][DBLP ] Conf ] Dingchao Li , Yuji Iwahori , Naohiro Ishii Exploiting Heterogeneous Parallelism in the Presence of Communication Delays. [Citation Graph (0, 0)][DBLP ] Conf ] Jörg Henrichs Optimizing and Load Balancing Metacomputing Applications. [Citation Graph (0, 0)][DBLP ] Conf ] Cosimo Anglano Predicting Parallel Applications Performance on Non-Dedicated Cluster Platforms. [Citation Graph (0, 0)][DBLP ] Conf ] François Bodin , Yann Mével , Rene Quiniou A User Level Program Transformation Tool. [Citation Graph (0, 0)][DBLP ] Conf ] William M. Pottenger The Role of Associativity and Commutativity in the Detection and Transformation of Loop-level Parallelism. [Citation Graph (0, 0)][DBLP ] Conf ] Weng-Long Chang , Chih-Ping Chu The Infinity Lambda Test. [Citation Graph (0, 0)][DBLP ] Conf ] Sungdo Moon , Mary W. Hall , Brian R. Murphy Predicated Array Data-flow Analysis for Run-time Parallelization. [Citation Graph (0, 0)][DBLP ] Conf ] Byoungro So , Sungdo Moon , Mary W. Hall Measuring the Effectiveness of Automatic Parallelization in SUIF. [Citation Graph (0, 0)][DBLP ] Conf ] Maciej Brodowicz , Olin Johnson PARADISE: An Advanced Featured Parallel File System. [Citation Graph (0, 0)][DBLP ] Conf ] Jan-Jan Wu , Pangfeng Liu Distributed Data Structure Design for Scientific Computation. [Citation Graph (0, 0)][DBLP ] Conf ] Lars Lundberg , Daniel Häggander Bounding on the Gain of Optimizing Data Layout in Vector Processors. [Citation Graph (0, 0)][DBLP ] Conf ] Francis O'Carroll , Hiroshi Tezuka , Atsushi Hori , Yutaka Ishikawa The Design and Implementation of Zero Copy MPI Using Commodity Hardware with a High Performance Network. [Citation Graph (0, 0)][DBLP ] Conf ] Cheng Liao , Dongming Jiang , Liviu Iftode , Margaret Martonosi , Douglas W. Clark Monitoring Shared Virtual Memory Performance on a Myrinet-based PC Cluster. [Citation Graph (0, 0)][DBLP ] Conf ] Takashi Matsumoto , Kei Hiraki MBCF: A Protected and Virtualized High-Speed User-Level Memory-Based Communication Facility. [Citation Graph (0, 0)][DBLP ] Conf ] Osamu Tatebe , Yuetsu Kodama , Satoshi Sekiguchi , Yoshinori Yamaguchi Highly Efficient Implementation of MPI Point-to-Point Communication Using Remote Memory Operations. [Citation Graph (0, 0)][DBLP ] Conf ] Angelos Bilas , Liviu Iftode , Jaswinder Pal Singh Evaluation of Hardware Write Propagation Support for Next-generation Shared Virtual Memory Clusters. [Citation Graph (0, 0)][DBLP ] Conf ] Paul D. Coddington , Sung Hoon Ko Techniques for Empirical Testing of Parallel Random Number Generators. [Citation Graph (0, 0)][DBLP ] Conf ] Alexis Vartanian , Jean-Luc Béchennec , Nathalie Drach-Temam Evaluation of High Performance Multicache Parallel Texture Mapping. [Citation Graph (0, 0)][DBLP ] Conf ] Venkatram Krishnaswamy , Prithviraj Banerjee Parallel Compiled Event Driven VHDL Simulation. [Citation Graph (0, 0)][DBLP ] Conf ] Andrew Sohn , Yuetsu Kodama Load Balanced Parallel Radix Sort. [Citation Graph (0, 0)][DBLP ] Conf ] Kenji Suehiro , Hitoshi Murai , Yoshiki Seo Integer Sorting on Shared-Memory Vector Parallel Computers. [Citation Graph (0, 0)][DBLP ] Conf ] Kei Hiraki , Junji Tamatsukuri , Takashi Matsumoto Speculative Execution Model with Duplication. [Citation Graph (0, 0)][DBLP ] Conf ] Suvas Vajracharya , Dirk Grunwald Dependence Driven Execution for Multiprogrammed Multiprocessor. [Citation Graph (0, 0)][DBLP ] Conf ] Eleftherios D. Polychronopoulos , Xavier Martorell , Dimitrios S. Nikolopoulos , Jesús Labarta , Theodore S. Papatheodorou , Nacho Navarro Kernel-level Scheduling for the Nano-threads Programming Model. [Citation Graph (0, 0)][DBLP ] Conf ] Jeong-Si Kim , Yong-Kee Jun Scalable On-the-fly Detection of the First Races in Parallel Programs. [Citation Graph (0, 0)][DBLP ] Conf ] Gabriel Rivera , Chau-Wen Tseng Eliminating Conflict Misses for High Performance Architectures. [Citation Graph (0, 0)][DBLP ] Conf ] Matthias M. Müller , Thomas M. Warschko , Walter F. Tichy Prefetching on the Cray-T3E. [Citation Graph (0, 0)][DBLP ] Conf ] Pablo Ibáñez , Víctor Viñals , José Luis Briz , María Jesús Garzarán Characterization and Improvement of Load/Store Cache-based Prefetching. [Citation Graph (0, 0)][DBLP ] Conf ] Chi-Hung Chi , Chin-Ming Cheung Hardware-driven Prefetching for Pointer Data References. [Citation Graph (0, 0)][DBLP ] Conf ] Ricardo Bianchini , Raquel Pinto , Claudio Luis de Amorim Data Prefetching for Software DSMs. [Citation Graph (0, 0)][DBLP ] Conf ] Yomin Hou , Chien-Min Wang , Lih-Hsing Hsu Depth Contention-free Broadcasting on Torus Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Enrique V. Carrera , Ricardo Bianchini OPTNET: A Cost-effective Optical Network for Multiprocessors. [Citation Graph (0, 0)][DBLP ] Conf ] Cruz Izu , Agustin Arruabarrena Applying Segment Routing to k-ary n-cube Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Sajal K. Das , Daniel J. Harvey , Rupak Biswas Dynamic Load Balancing for Adaptive Meshes Using Symmetric Broadcast Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Roger Espasa , Mateo Valero , James E. Smith Vector Architectures: Past, Present and Future. [Citation Graph (0, 0)][DBLP ] Conf ] Rakefet Kol , Ran Ginosar Kin : A High Performance Asynchronous Processor Architecture.Citation Graph (0, 0)][DBLP ] Conf ] David López , Josep Llosa , Mateo Valero , Eduard Ayguadé Resource Widening Versus Replication: Limits and Performance-cost Trade-off. [Citation Graph (0, 0)][DBLP ] Conf ] Jude A. Rivers , Edward S. Tam , Gary S. Tyson , Edward S. Davidson , Matthew K. Farrens Utilizing Reuse Information in Data Cache Management. [Citation Graph (0, 0)][DBLP ] Conf ] Stefanos Kaxiras , Stein Gjessing , James R. Goodman A Study of Three Dynamic Approaches to Handle Widely Shared Data in Shared-memory Multiprocessors. [Citation Graph (0, 0)][DBLP ] Conf ] 