Conferences in DBLP
David Nassimi , Yuh-Dong Tsai Efficient Implementations of a Class of ± 2b [Citation Graph (0, 0)][DBLP ] Conf ] J. Andrew Holey , Oscar H. Ibarra Triangulation in a Plane and 3-D Convex Hull on Mesh-Connected Arrays and Hypercubes. [Citation Graph (0, 0)][DBLP ] Conf ] Dan C. Marinescu , John R. Rice The Effects of Communication Latency Upon Synchronization and Dynamic Load Balance on a Hypercube. [Citation Graph (0, 0)][DBLP ] Conf ] Dionisios I. Reisis Improved Graph Computations on the Reconfigurable Mesh. [Citation Graph (0, 0)][DBLP ] Conf ] Linda F. Wilson , Mario J. Gonzalez Design Guidelines for Parallel Algorithms Using Continuous Job Profiles. [Citation Graph (0, 0)][DBLP ] Conf ] I-Ling Yen , Farokh B. Bastani , Ernst L. Leiss An Inherently Fault Tolerant Sorting Algorithm. [Citation Graph (0, 0)][DBLP ] Conf ] Anupam Basu , S. Srinivas , Kamlesh G. Kumar , Arogyaswami Paulraj , Lalit M. Patnaik Performance Analysis of Algorithms on a Message Passing Multiprocessor. [Citation Graph (0, 0)][DBLP ] Conf ] M. A. Sridhar , Shri K. Goyal Routing Algorithms in Interval and Circular-Arc Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Alan C. Shaw Deterministic Timing Schema for Parallel Programs. [Citation Graph (0, 0)][DBLP ] Conf ] Eva Leung , Xiaobo Li Generalized Formulation and Hypercube Algorithms for Relaxation Labeling. [Citation Graph (0, 0)][DBLP ] Conf ] Jeffrey C. Becker , Charles U. Martel , Arvin Park General Asynchrony Is Not Expensive for PRAMs. [Citation Graph (0, 0)][DBLP ] Conf ] Oscar H. Ibarra , Myung Hee Kim Fast Parallel Algorithms for Solving Triangular Systems of Linear Equations on the Hypercube. [Citation Graph (0, 0)][DBLP ] Conf ] Hillel Gazit Optimal EREW Parallel Algorithms for Connectivity, Ear Decomposition and st-Numbering of Planar Graphs. [Citation Graph (0, 0)][DBLP ] Conf ] Vineet Singh , Vipin Kumar , Gul Agha , Chris Tomlinson Scalability of Parallel Sorting on Mesh Multicomputers. [Citation Graph (0, 0)][DBLP ] Conf ] Gerard J. M. Smit , Paul J. M. Havinga , Pierre G. Jansen An Algorithm for Generating Node Disjoint Routes in Kautz Digraphs. [Citation Graph (0, 0)][DBLP ] Conf ] Marios M. Polycarpou , Petros A. Ioannou A Neural-Type Parallel Algorithm for Fast Matrix Inversion. [Citation Graph (0, 0)][DBLP ] Conf ] Zhaofang Wen Parallel Multiple Search. [Citation Graph (0, 0)][DBLP ] Conf ] Si-Qing Zheng SIMD Data Communication Algorithms for Multiply Twisted Hypercubes. [Citation Graph (0, 0)][DBLP ] Conf ] Sushil K. Prasad , Narsingh Deo Two EREW Algorithms for Parentheses Matching. [Citation Graph (0, 0)][DBLP ] Conf ] Calvin Ching-Yuen Chen , Sajal K. Das A Cost-Optimal Parallel Algorithm for the Parentheses Matching Problem on an EREW PRAM. [Citation Graph (0, 0)][DBLP ] Conf ] Judith O. Berkey , Pearl Y. Wang A Parallel Approximation Algorithm for Solving One-Dimensional Bin Packing Problems. [Citation Graph (0, 0)][DBLP ] Conf ] Venkata K. Prabhala , Naveed A. Sherwani Fully Normal Algorithms for Incomplete Hypercubes. [Citation Graph (0, 0)][DBLP ] Conf ] Ravi Varadarajan , Bhavani Ravichandran Refining Algorithm Mappings for Linear Systolic Arrays. [Citation Graph (0, 0)][DBLP ] Conf ] Roger D. Chamberlain , Mark A. Franklin Analysis of Parallel Mixed-Mode Simulation Algorithms. [Citation Graph (0, 0)][DBLP ] Conf ] S. N. Gupta , Mohammad Zubair , C. E. Grosch Implementation of an Oversize Neural Network on DAP-510. [Citation Graph (0, 0)][DBLP ] Conf ] Sajal K. Das , Cui-Qing Yang Performance of Parallel Spanning Tree Algorithms on Linear Arrays of Transputers and Unix Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Ju-wook Jang , K. Wojtek Przytula Trade-Offs In Mapping FFT Computations onto Fixed Size Mesh Processor Array. [Citation Graph (0, 0)][DBLP ] Conf ] Scott T. Toborg , Kai Hwang Parallel Vision Integration on the AMT Distributed Array Processor. [Citation Graph (0, 0)][DBLP ] Conf ] Lakshman Prasad , S. Sitharama Iyengar , Rangasami L. Kashyap , R. N. Madan Functional Characterization of Sensor Integration in Distributed Sensor Networks. [Citation Graph (0, 0)][DBLP ] Conf ] James J. Kistler , Jon A. Webb Connected Components with Split and Merge. [Citation Graph (0, 0)][DBLP ] Conf ] Selim Akyokus , P. Bruce Berra Otpical Content Addressable Memories for Data/Knowledge Base Processing. [Citation Graph (0, 0)][DBLP ] Conf ] Jing-Fu Fu Jenq , Sartaj Sahni Reconfigurable Mesh Algorithms for Image Shrinking, Expanding, Clustering, and Template Matching. [Citation Graph (0, 0)][DBLP ] Conf ] D. B. Shu , J. Greg Nash , K. Kim Parallel Implementation of Image Understanding Tasks on Gated-Connection Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Arthur Abnous , Nader Bagherzadeh Special Features of a VLIW Architecture. [Citation Graph (0, 0)][DBLP ] Conf ] Zhen-Ping Lo , Behnam Bavarian A Neural Algorithm for Variable Thresholding of Images. [Citation Graph (0, 0)][DBLP ] Conf ] Ahmed Louri Design of an Optical Content-Addressable Parallel Processor with Applications to Fast Searching and Information Retrieval. [Citation Graph (0, 0)][DBLP ] Conf ] Peter Wohl , Thomas W. Christopher A Parallel Processing Approach to Incremental Conceptual Clustering. [Citation Graph (0, 0)][DBLP ] Conf ] Zhen-Ping Lo , Masahiro Fujita , Behnam Bavarian Analysis of Neighborhood Interaction in Kohonen Neural Networks. [Citation Graph (0, 0)][DBLP ] Conf ] K. P. Lam , C. J. Su On a Binary Relation Inference Network. [Citation Graph (0, 0)][DBLP ] Conf ] Steve Kuo , Dan I. Moldovan , Seungho Cha MCMR: A Multiple Rule Firing Production System Model. [Citation Graph (0, 0)][DBLP ] Conf ] Alok N. Choudhary , Ravi Ponnusamy Guided Scheduling Schemes for Image Understanding Tasks for Shared and Distributed Memory Multiprocessors. [Citation Graph (0, 0)][DBLP ] Conf ] Soon Myoung Chung Optical Database Machine Using Spatial Light Rebroadcasters. [Citation Graph (0, 0)][DBLP ] Conf ] Ronald F. DeMara , Dan I. Moldovan Design of a Clustered Multiprocessor for Real-time Natural Language Understanding. [Citation Graph (0, 0)][DBLP ] Conf ] Shuichi Sakai , Yuetsu Kodama , Yoshinori Yamaguchi Prototype Implementation of a Highly Parallel Dataflow Machine EM-4. [Citation Graph (0, 0)][DBLP ] Conf ] Arun K. Somani , Craig M. Wittenbrink , Robert M. Haralick , Linda G. Shapiro , Jenq-Neng Hwang , Chung-Ho Chen , Robert Johnson , Kenneth Cooper Proteus System Architecture and Organization. [Citation Graph (0, 0)][DBLP ] Conf ] S. G. Skinner , Peter M. Flanders , A. G. Bale Development of a Mixed MIMD-SIMD Architecture Using the AMT DAP. [Citation Graph (0, 0)][DBLP ] Conf ] Thomas B. Berg , Howard Jay Siegel Instruction Execution Trade-Offs for SIMD vs. MIMD vs. Mixed Mode Parallelism. [Citation Graph (0, 0)][DBLP ] Conf ] William Tsun-Yuk Hsu , Pen-Chung Yew An Effective Synchronization Network for Large Multiprocessor Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Paraskevas Evripidou , Jean-Luc Gaudiot Input/Output Operations for Hybrid Data-Flow/Control-Flow Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Stein Gjessing , Stein Krogdahl , Ellen Munthe-Kaas A Linked List Cache Coherence Protocol: Verifying the Bottom Layer. [Citation Graph (0, 0)][DBLP ] Conf ] Zhixi Fang , Mi Lu , Hua Lin An Approach to Solve the Cache Thrashing Problem. [Citation Graph (0, 0)][DBLP ] Conf ] Kenji Toda , Kenji Nishida , Yoshinobu Uchibori , Shuichi Sakai , Toshio Shimada Parallel Multi-Context Architecture with High-Speed Synchronization Mechanism. [Citation Graph (0, 0)][DBLP ] Conf ] Graham M. Megson Systolic Rank Updating and the Solution of Non-Linear Equations. [Citation Graph (0, 0)][DBLP ] Conf ] Michael Ogbonna Esonu , Asim J. Al-Khalili , Salim Hariri On the Design of Optimal Fault-Tolerant Systolic Array Architecures. [Citation Graph (0, 0)][DBLP ] Conf ] Khaled M. Elleithy , Magdy A. Bayoumi From Algorithms to Parallel Architectures: A Formal Approach. [Citation Graph (0, 0)][DBLP ] Conf ] Amiya Nayak , Nicola Santoro Bounds on Performance of VLSI Processor Arrays. [Citation Graph (0, 0)][DBLP ] Conf ] S. Erlich , K. Yao Systolic Array Architecture for Adaptive Eigenstructure Decomposition of Correlation Matrices. [Citation Graph (0, 0)][DBLP ] Conf ] G. M. Chaudhry , J. S. Bedi State Variable Model for a Class of Multiprocessor Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Joydeep Ghosh , Bipul Agarwal Parallel I/O Subsystems for Distributed-Memory Multicomputers. [Citation Graph (0, 0)][DBLP ] Conf ] Peter M. Athanas , Harvey F. Silverman Amstrong II: A Loosely Coupled Multiprocessor with a Reconfigurable Communications Architecture. [Citation Graph (0, 0)][DBLP ] Conf ] Isaac D. Scherson Multidimensional Access Shared Memory Parallel Processing Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Kichul Kim , C. S. Raghavendra A Simple Algorithm to Route Arbitrary Permuations on 8-Input 5-Stage Shuffle/Exchange Network. [Citation Graph (0, 0)][DBLP ] Conf ] Jung-Sing Jwo , S. Lakshmivarahan , Sudarshan K. Dhall Characterization of Node Disjoint (Parallel) Path in Star Graphs. [Citation Graph (0, 0)][DBLP ] Conf ] Abdou Youssef Efficient Randomized Routing on Clos Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Ajay K. Gupta , Alfred J. Boals , Naveed A. Sherwani On Optimal Embeddings into Incomplete Hypercubes. [Citation Graph (0, 0)][DBLP ] Conf ] Sung-Woo Park , Wei Kang Tsai Distributed Hierarchical Optimal Routing Using Aggregation/Disaggergation and Decomposition/Composition Techniques. [Citation Graph (0, 0)][DBLP ] Conf ] S. V. R. Madabhushi , S. Lakshmivarahan , Sudarshan K. Dhall A Note on Orthogonal Graphs. [Citation Graph (0, 0)][DBLP ] Conf ] Wolfgang K. Giloi , Sergio Montenegro Choosing the Interconnect of Distributed Memory Systems by Cost and Blocking Behavior. [Citation Graph (0, 0)][DBLP ] Conf ] Adam Dingle , H. Barada Optimum Embeddings of End-Around Meshes into Pyramid Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Ravi Mittal , Bijendra N. Jain , Rakesh K. Patney Link Augmented Binary (LAB)-Tree: Its Structure, Routing and Fault Tolerance Properties. [Citation Graph (0, 0)][DBLP ] Conf ] Kemal Efe , Kumar Ramaiyer Congestion and Fault Tolerance of Binary Tree Embeddings on Hypercube. [Citation Graph (0, 0)][DBLP ] Conf ] W. Worth Kirkman , Donna J. Quammen Packed Exponential Connections - A Hierarchy of 2-D Meshes. [Citation Graph (0, 0)][DBLP ] Conf ] Enamul Haq Cross-Cube: A New Fault Tolerant Hypercube-Based Network. [Citation Graph (0, 0)][DBLP ] Conf ] Mokhtar Aboelaze Multi-level Hypercube Network. [Citation Graph (0, 0)][DBLP ] Conf ] Shyan-Ming Yuan A Resilient Decentralized Commit Protocol. [Citation Graph (0, 0)][DBLP ] Conf ] Abdelghani Bellaachia , Abdou Youssef Greedy Partitioning Strategy for Banyan-Hypercube Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Behrooz Parhami High-Performance Parallel Pipelined Voting Networks. [Citation Graph (0, 0)][DBLP ] Conf ] Tohru Matsunaga , Ikuro Oyaizu , E. Uozumi , T. Hoshiko , Y. Kimura Modeling and Performance Analysis for Processor-to-Processor Communications Unit Using a 100 Mb/s Optical Token Ring. [Citation Graph (0, 0)][DBLP ] Conf ] Krishna P. Belkhale , Prithviraj Banerjee A Scheduling Algorithm for Parallelizable Dependent Tasks. [Citation Graph (0, 0)][DBLP ] Conf ] Chiun-Chieh Hsu Scheduling and Optimization for Multiprocessor Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Juan Li , Leah H. Jamieson A System for Algorithm-Architecture Mapping Based on Dependence Graph Matching and Hypergraphs. [Citation Graph (0, 0)][DBLP ] Conf ] Sukil Kim , Santosh Pande , Dharma P. Agrawal , Jon Mauney A Message Segmentation Technique to Minimize Task Completion Time. [Citation Graph (0, 0)][DBLP ] Conf ] Jinwoon Woo , Sartaj Sahni Load Balancing on a Hypercube. [Citation Graph (0, 0)][DBLP ] Conf ] Albert Chuang-shi Yu , Kwei-Jay Lin Scheduling Parallelizable Imprecise Computations on Multiprocessors. [Citation Graph (0, 0)][DBLP ] Conf ] C. S. Raghavendra , Suresh Chalasani , Rajendra V. Boppana Improved Algorithms for Load Balancing in Circuit-Switched Hypercubes. [Citation Graph (0, 0)][DBLP ] Conf ] Laxmikant V. Kalé , Balkrishna Ramkumar Implementation of a Parallel Prolog Interpreter on Multiprocessors. [Citation Graph (0, 0)][DBLP ] Conf ] Nagaraj Shenoy , U. S. Shukla , Arogyaswami Paulraj Design and Evaluation of a High Performance File System for Message Passing Parallel Computers. [Citation Graph (0, 0)][DBLP ] Conf ] John W. C. Fu , Janak H. Patel Data Prefetching Strategies for Vector Cache Memories. [Citation Graph (0, 0)][DBLP ] Conf ] James Arthur Kohl , Thomas L. Casavant Use of PARADISE: A Meta-Tool for Visualizing Parallel Systems. [Citation Graph (0, 0)][DBLP ] Conf ] John D. Bruner , Hoichi Cheong , Alexander V. Veidenbaum , Pen-Chung Yew Chief: A Parallel Simulation Environment for Parallel Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Kechang Dai , Wolfgang K. Giloi Confining Imperative Languages for Parallel Processing. [Citation Graph (0, 0)][DBLP ] Conf ] Catherine Mongenet , Philippe Clauss , Guy-René Perrin A Geometrical Coding to Compile Affine Recurrence Equations on Regular Arrays. [Citation Graph (0, 0)][DBLP ] Conf ] Alberto Avritzer , Mario Gerla , Jack W. Carlyle A Load Sharing Interconnection Network for Hard Real-Time Systems. [Citation Graph (0, 0)][DBLP ] Conf ] Dattatraya Kulkarni , Kamlesh G. Kumar , Anupam Basu , Arogyaswami Paulraj Loop Partitioning Unimodular Transformations for Distributed Memory Multiprocessors. [Citation Graph (0, 0)][DBLP ] Conf ] Pei Ouyang Execution of Regular DO Loops on Asynchronous Multiprocessors. [Citation Graph (0, 0)][DBLP ] Conf ] Pradeep Kumar Sinha , Kyu Sung Park , Xiaohua Jia , Kentaro Shimizu , Mamoru Maekawa Process Migration in the GALAXY Distributed Operating System. [Citation Graph (0, 0)][DBLP ] Conf ] Chih-Ping Chu , Doris L. Carver An Analysis of Recurrence Relations in Fortran Do-loops for Vector Processing. [Citation Graph (0, 0)][DBLP ] Conf ] Alok Srivastava , Sanjay C. Kshetramade PRESHAK: A Generic Tool to Implement Application Specific Message-Passing Communication Kernels for Concurrent Machines. [Citation Graph (0, 0)][DBLP ] Conf ] Ki-Chang Kim , Alexandru Nicolau Parallelizing Tightly Nested Loops. [Citation Graph (0, 0)][DBLP ] Conf ] George K. Thiruvathukal , Thomas W. Christopher A Simulation of Demand-Driven Dataflow: Translation from Lucid into MDC Language. [Citation Graph (0, 0)][DBLP ] Conf ] B. Dehbonei , Christophe Laurent , Nadia Tawbi , R. S. Kulkarni PMACS: An Environment for Parallel Programming. [Citation Graph (0, 0)][DBLP ] Conf ] Isik Aybay , Mehmet Baray An OR-Parallel and Restricted AND-Parallel Nonbacktracking Prolog Execution Model. [Citation Graph (0, 0)][DBLP ] Conf ] Alfred Brenner , Richard F. Freund , R. Stockton Gaines , Rob Kelly , Louis Lome , Richard McAndrew , Alexandru Nicolau , Janak H. Patel , Thomas Probert , John H. Reif , Jorge L. C. Sanz , Howard Jay Siegel , Jon A. Webb How Do We Make Parallel Processing a Reality? Bridging the Gap Between Theory and Practice. [Citation Graph (0, 0)][DBLP ] Conf ] 