Conferences in DBLP

Languages, Compilers, and Tools for Embedded Systems (LCTES) (lctrts)
2004 (conf/lctrts/2004)

1. Iosif Antochi, Ben H. H. Juurlink, Stamatis Vassiliadis, Petri Liuha
   GraalBench: a 3D graphics benchmark suite for mobile phones. [Citation Graph (0, 0)][DBLP]
   LCTES, 2004, pp:1-9 [Conf]
   
2. Thomas Martin, Mark Jones, Joshua Edmison, Tanwir Sheikh, Zahi Nakad
   Modeling and simulating electronic textile applications. [Citation Graph (0, 0)][DBLP]
   LCTES, 2004, pp:10-19 [Conf]
   
3. Paul Willmann, Michael Brogioli, Vijay S. Pai
   Spinach: a liberty-based simulator for programmable network interface architectures. [Citation Graph (0, 0)][DBLP]
   LCTES, 2004, pp:20-29 [Conf]
   
4. Christopher L. Conway, Stephen A. Edwards
   NDL: a domain-specific language for device drivers. [Citation Graph (0, 0)][DBLP]
   LCTES, 2004, pp:30-36 [Conf]
   
5. Nagendra J. Kumar, Siddhartha Shivshankar, Alexander G. Dean
   Asynchronous software thread integration for efficient software. [Citation Graph (0, 0)][DBLP]
   LCTES, 2004, pp:37-46 [Conf]
   
6. Wei Qin, Subramanian Rajagopalan, Sharad Malik
   A formal concurrency model based architecture description language for synthesis of software development tools. [Citation Graph (0, 0)][DBLP]
   LCTES, 2004, pp:47-56 [Conf]
   
7. Ravindra Jejurikar, Rajesh K. Gupta
   Procrastination scheduling in fixed priority real-time systems. [Citation Graph (0, 0)][DBLP]
   LCTES, 2004, pp:57-66 [Conf]
   
8. Xiaotong Zhuang, Santosh Pande
   Power-efficient prefetching via bit-differential offset assignment on embedded processors. [Citation Graph (0, 0)][DBLP]
   LCTES, 2004, pp:67-77 [Conf]
   
9. Gilles Pokam, Olivier Rochecouste, André Seznec, François Bodin
   Speculative software management of datapath-width for energy optimization. [Citation Graph (0, 0)][DBLP]
   LCTES, 2004, pp:78-87 [Conf]
   
10. Chaeseok Im, Soonhoi Ha
    Dynamic voltage scaling for real-time multi-task scheduling using buffers. [Citation Graph (0, 0)][DBLP]
    LCTES, 2004, pp:88-94 [Conf]
    
11. Lian Li 0002, Jingling Xue
    A trace-based binary compilation framework for energy-aware computing. [Citation Graph (0, 0)][DBLP]
    LCTES, 2004, pp:95-106 [Conf]
    
12. James Lapalme, El Mostapha Aboulhamid, Gabriela Nicolescu, Luc Charest, François R. Boyer, J. P. David, Guy Bois
    ESys.Net: a new solution for embedded systems modeling and simulation. [Citation Graph (0, 0)][DBLP]
    LCTES, 2004, pp:107-114 [Conf]
    
13. Gilberto Contreras, Margaret Martonosi, Jinzhan Peng, Roy Ju, Guei-Yuan Lueh
    XTREM: a power simulator for the Intel XScale® core. [Citation Graph (0, 0)][DBLP]
    LCTES, 2004, pp:115-125 [Conf]
    
14. Uwe Kastens, Dinh Khoi Le, Adrian Slowik, Michael Thies
    Feedback driven instruction-set extension. [Citation Graph (0, 0)][DBLP]
    LCTES, 2004, pp:126-135 [Conf]
    
15. Kaustubh Patil, Kiran Seth, Frank Mueller
    Compositional static instruction cache simulation. [Citation Graph (0, 0)][DBLP]
    LCTES, 2004, pp:136-145 [Conf]
    
16. Johan Stärner, Lars Asplund
    Measuring the cache interference cost in preemptive real-time systems. [Citation Graph (0, 0)][DBLP]
    LCTES, 2004, pp:146-154 [Conf]
    
17. Lingli Zhang, Chandra Krintz
    Adaptive code unloading for resource-constrained JVMs. [Citation Graph (0, 0)][DBLP]
    LCTES, 2004, pp:155-164 [Conf]
    
18. Peng Li, Steve Zdancewic
    Advanced control flow in Java card programming. [Citation Graph (0, 0)][DBLP]
    LCTES, 2004, pp:165-174 [Conf]
    
19. Jia Zeng, Cristian Soviani, Stephen A. Edwards
    Generating fast code from concurrent program dependence graphs. [Citation Graph (0, 0)][DBLP]
    LCTES, 2004, pp:175-181 [Conf]
    
20. Jason Hiser, Jack W. Davidson
    EMBARC: an efficient memory bank assignment algorithm for retargetable compilers. [Citation Graph (0, 0)][DBLP]
    LCTES, 2004, pp:182-191 [Conf]
    
21. Xiaotong Zhuang, Tao Zhang, Santosh Pande
    Hardware-managed register allocation for embedded processors. [Citation Graph (0, 0)][DBLP]
    LCTES, 2004, pp:192-201 [Conf]
    
22. Jean-Marc Daveau, Thomas Thery, Thierry Lepley, Miguel Santana
    A retargetable register allocation framework for embedded processors. [Citation Graph (0, 0)][DBLP]
    LCTES, 2004, pp:202-210 [Conf]
    
23. Bruno De Bus, Bjorn De Sutter, Ludo Van Put, Dominique Chanet, Koen De Bosschere
    Link-time optimization of ARM binaries. [Citation Graph (0, 0)][DBLP]
    LCTES, 2004, pp:211-220 [Conf]
    
24. Bernhard Scholz, R. Nigel Horspool, Jens Knoop
    Optimizing for space and time usage with speculative partial redundancy elimination. [Citation Graph (0, 0)][DBLP]
    LCTES, 2004, pp:221-230 [Conf]
    
25. L. Almagor, Keith D. Cooper, Alexander Grosul, Timothy J. Harvey, Steven W. Reeves, Devika Subramanian, Linda Torczon, Todd Waterman
    Finding effective compilation sequences. [Citation Graph (0, 0)][DBLP]
    LCTES, 2004, pp:231-239 [Conf]
    
26. Hendra Saputra, Guangyu Chen, R. R. Brooks, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
    Code protection for resource-constrained embedded devices. [Citation Graph (0, 0)][DBLP]
    LCTES, 2004, pp:240-248 [Conf]
    
27. Zhi Guo, Betul Buyukkurt, Walid A. Najjar
    Input data reuse in compiling window operations onto reconfigurable hardware. [Citation Graph (0, 0)][DBLP]
    LCTES, 2004, pp:249-256 [Conf]
    
28. Andrzej Wasowski
    Flattening statecharts without explosions. [Citation Graph (0, 0)][DBLP]
    LCTES, 2004, pp:257-266 [Conf]