Conferences in DBLP

Power-Aware Computer Systems (PACS) (pacs)
2003 (conf/pacs/2003)

1. Yao Guo, Saurabh Chheda, Csaba Andras Moritz
   Runtime Biased Pointer Reuse Analysis and Its Application to Energy Efficiency. [Citation Graph (0, 0)][DBLP]
   PACS, 2003, pp:1-12 [Conf]
   
2. Jerry Hom, Ulrich Kremer
   Inter- rogram Compilation for Disk Energy Reduction. [Citation Graph (0, 0)][DBLP]
   PACS, 2003, pp:13-25 [Conf]
   
3. Robert N. Mayo, Parthasarathy Ranganathan
   Energy Consumption in Mobile Devices: Why Future Systems Need Requirements-Aware Energy Scale-Down. [Citation Graph (0, 0)][DBLP]
   PACS, 2003, pp:26-40 [Conf]
   
4. Manish Verma, Lars Wehmeyer, Peter Marwedel
   Efficient Scratchpad Allocation Algorithms for Energy Constrained Embedded Systems. [Citation Graph (0, 0)][DBLP]
   PACS, 2003, pp:41-56 [Conf]
   
5. Ye Wen, Richard Wolski, Chandra Krintz
   Online Prediction of Battery Lifetime for Embedded and Mobile Devices. [Citation Graph (0, 0)][DBLP]
   PACS, 2003, pp:57-72 [Conf]
   
6. John Oliver, Ravishankar Rao, Paul Sultana, Jedidiah R. Crandall, Erik Czernikowski, Leslie W. Jones IV, Dean Copsey, Diana Keen, Venkatesh Akella, Frederic T. Chong
   Synchroscalar: Initial Lessons in Power-Aware Design of a Tile-Based Embedded Architecture. [Citation Graph (0, 0)][DBLP]
   PACS, 2003, pp:73-85 [Conf]
   
7. Wajahat Qadeer, Tajana Simunic Rosing, John Ankcorn, Venky Krishnan, Giovanni De Micheli
   Heterogeneous Wireless Network Management. [Citation Graph (0, 0)][DBLP]
   PACS, 2003, pp:86-100 [Conf]
   
8. Daniel Citron, Dror G. Feitelson
   "Look It Up" or "Do the Math": An Energy, Area, and Timing Analysis of Instruction Reuse and Memoization. [Citation Graph (0, 0)][DBLP]
   PACS, 2003, pp:101-116 [Conf]
   
9. Soraya Ghiasi, Wesley M. Felter
   CPU Packing for Multiprocessor Power Reduction. [Citation Graph (0, 0)][DBLP]
   PACS, 2003, pp:117-131 [Conf]
   
10. John S. Seng, Dean M. Tullsen
    Exploring the Potential of Architecture-Level Power Optimizations. [Citation Graph (0, 0)][DBLP]
    PACS, 2003, pp:132-147 [Conf]
    
11. Weiping Liao, Lei He
    Coupled Power and Thermal Simulation with Active Cooling. [Citation Graph (0, 0)][DBLP]
    PACS, 2003, pp:148-163 [Conf]
    
12. Xiaobo Fan, Carla Schlatter Ellis, Alvin R. Lebeck
    The Synergy Between Power-Aware Memory Systems and Processor Voltage Scaling. [Citation Graph (0, 0)][DBLP]
    PACS, 2003, pp:164-179 [Conf]
    
13. Rajeev Balasubramonian, Viji Srinivasan, Sandhya Dwarkadas, Alper Buyuktosunoglu
    Hot-and-Cold: Using Criticality in the Design of Energy-Efficient Caches. [Citation Graph (0, 0)][DBLP]
    PACS, 2003, pp:180-195 [Conf]
    
14. Roni Rosner, Yoav Almog, Micha Moffie, Naftali Schwartz, Avi Mendelson
    PARROT: Power Awareness Through Selective Dynamically Optimized Traces. [Citation Graph (0, 0)][DBLP]
    PACS, 2003, pp:196-214 [Conf]