Conferences in DBLP

IEEE International Workshop on Rapid System Prototyping (rsp)
1999 (conf/rsp/1999)

1. Didier Buchs, Mathieu Buffo
   Rapid Prototyping of Formally Modelled Distributed Systems. [Citation Graph (0, 0)][DBLP]
   IEEE International Workshop on Rapid System Prototyping, 1999, pp:4-9 [Conf]
   
2. Peter Henderson, Robert John Walters
   System Design Validation Using Formal Models. [Citation Graph (0, 0)][DBLP]
   IEEE International Workshop on Rapid System Prototyping, 1999, pp:10-14 [Conf]
   
3. F. Hessel, P. Coste, P. LeMarrec, Nacer-Eddine Zergainoh, Jean-Marc Daveau, Ahmed Amine Jerraya
   Communication Interface Synthesis for Multilanguage Specifications. [Citation Graph (0, 0)][DBLP]
   IEEE International Workshop on Rapid System Prototyping, 1999, pp:15-20 [Conf]
   
4. A. Vasilliou, K. Gounaris, K. Adaos, D. Mitsainas, George Alexiou, Dimitris Nikolos
   Development of a Reusable E1 Transceiver Suitable for Rapid Prototyping. [Citation Graph (0, 0)][DBLP]
   IEEE International Workshop on Rapid System Prototyping, 1999, pp:21-0 [Conf]
   
5. Werner Erhard, Andreas Reinsch, Torsten Schober
   First Steps towards a Reconfigurable Asynchronous System. [Citation Graph (0, 0)][DBLP]
   IEEE International Workshop on Rapid System Prototyping, 1999, pp:28-31 [Conf]
   
6. S. Shrivastava, V. K. Jain
   Rapid System Prototyping for High Performance Reconfigurable Computing. [Citation Graph (0, 0)][DBLP]
   IEEE International Workshop on Rapid System Prototyping, 1999, pp:32-27 [Conf]
   
7. Kia Bazargan, Ryan Kastner, Majid Sarrafzadeh
   3-D Floorplanning: Simulated Annealing and Greedy Placement Methods for Reconfigurable Computing Systems. [Citation Graph (0, 0)][DBLP]
   IEEE International Workshop on Rapid System Prototyping, 1999, pp:38-0 [Conf]
   
8. Young Geol Kim, Tag Gon Kim
   A Design and Tool Reuse Methodology for Rapid Prototyping of Application Specific Instruction Set Processors. [Citation Graph (0, 0)][DBLP]
   IEEE International Workshop on Rapid System Prototyping, 1999, pp:46-51 [Conf]
   
9. David L. Landis, Praveen Guddeti, Paul T. Hulina, Lee D. Coraor
   Language-Based Rapid Prototyping Methods for Legacy System Re-Engineering and Re-Use. [Citation Graph (0, 0)][DBLP]
   IEEE International Workshop on Rapid System Prototyping, 1999, pp:52-0 [Conf]
   
10. Martin Leucker, Thomas Noll
    Rapid Prototyping of Specification Language Implementations. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:60-65 [Conf]
    
11. Zineb Habbas, Francine Herrmann, Daniel Singer, Michaël Krajecki
    A Methodological Approach to Implement CSP on FPGA. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:66-0 [Conf]
    
12. Massimo Buzzoni, Dario Cardini, Roberto Gallino, Roberto Romagnese
    ATM Traffic Management Systems: ASIC Fast Prototyping. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:74-80 [Conf]
    
13. Tanja Van Achteren, Marleen Adé, Rudy Lauwereins, Marc Proesmans, Luc J. Van Gool, Jan Bormans, Francky Catthoor
    Transformations of a 3D Image Reconstruction Algorithm for Data Transfer and Storage Optimization. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:81-86 [Conf]
    
14. Sébastien Pillement, Lionel Torres, Michel Robert, Gaston Cambon
    Fast Prototyping: A Case Study - The JPEG Compression Algorithm. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:87-0 [Conf]
    
15. Achim Österling, Rolf Ernst
    Process Versions in Rapid Prototyping. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:94-99 [Conf]
    
16. Stefan M. Petters, Annette Muth, Thomas Kolloch, Thomas Hopfner, Franz Fischer, Georg Färber
    The REAR Framework for Emulation and Analysis of Embedded Hard Real-Time Systems . [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:100-107 [Conf]
    
17. Frank-Michael Renner, Jürgen Becker, Manfred Glesner
    Communication Performance Models for Architecture-Precise Prototyping of Real-Time Embedded Systems. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:108-113 [Conf]
    
18. Oliver Bringmann, Wolfgang Rosenstiel, Annette Muth, Georg Färber, Frank Slomka, Richard Hofmann
    Mixed Abstraction Level Hardware Synthesis from SDL for Rapid Prototyping. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:114-119 [Conf]
    
19. Matthias Dörfel, Frank Slomka, Richard Hofmann
    A Scalable Hardware Library for the Rapid Prototyping of SDL Specifications. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:120-0 [Conf]
    
20. Helena Krupnova, Christian Rabedaoro, Gabriele Saucier
    FPGA Partitioning for Rapid Prototyping: A 1 Million Gate Design Case Study. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:128-133 [Conf]
    
21. Karam S. Chatha, Ranga Vemuri
    An Iterative Algorithm for Partitioning and Scheduling of Area Constrained HW-SW Systems. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:134-139 [Conf]
    
22. A. Burst, M. Wolff, Markus Kühl, Klaus D. Müller-Glaser
    Scheduling Strategies and Estimations for Concept-Oriented Rapid Prototyping. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:140-145 [Conf]
    
23. Karlheinz Weiß, Thorsten Steckstor, Wolfgang Rosenstiel
    Performance Analysis of a RTOS by Emulation of an Embedded System. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:146-0 [Conf]
    
24. Ray Turner
    System-Level Verification - A Comparison of Approaches. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:154-159 [Conf]
    
25. Klaus Harbich, Jörn Stohmann, Erich Barke, Ludwig Schwoerer
    A Case Study: Logic Emulation - Pitfalls and Solutions. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:160-0 [Conf]
    
26. Ahmed Hemani, Johnny Öberg, Abhijit K. Deb, Dan Lindqvist, Björn Fjellborg
    System Level Virtual Prototyping of DSP ASICs Using Grammar Based Approach. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:166-171 [Conf]
    
27. Jeffrey M. Thompson, Mats Per Erik Heimdahl
    An Integrated Development Environment for Prototyping Safety Critical Systems. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:172-177 [Conf]
    
28. Walling R. Cyre, Jeffrey Hess, Andreas Gunawan, Ritesh Sojitra
    A Rapid Modeling Tool for Virtual Prototypes. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:178-183 [Conf]
    
29. R. Welge, Christian Müller-Schloer
    Graphical Design of Embedded Control System Software Based on SDL/RealTime with Special Support for Safety Critical Applications. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:184-189 [Conf]
    
30. Ansgar Bredenfeld, Jörg Wilberg
    Model Based Multi-Level Prototyping. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:190-195 [Conf]
    
31. Chanik Park, JaeWoong Chung, Soonhoi Ha
    Extended Synchronous Dataflow for Efficient DSP System Prototyping. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:196-0 [Conf]
    
32. B. Spitzer, A. Burst, M. Wolff, Klaus D. Müller-Glaser
    Interface Technologies for Versatile Rapid-Prototyping Systems. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:204-209 [Conf]
    
33. Vikram Pasham, Wilfrido A. Moreno, Fernando J. Falquez
    Field Programmable Multi Chip Modules Using Programmable Laser Interconnects. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:210-0 [Conf]
    
34. Man-tak Shing, Luqi, Valdis Berzins, Michael Saluto, Julian Williams
    Architectural Re-Engineering of Janus Using Object Modeling and Rapid Prototyping. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:216-221 [Conf]
    
35. Scott Deno, David L. Landis, Paul T. Hulina, Sanjay Balasubramanian
    A Rapid Prototyping Methodology for Reverse Engineering of Legacy Electronic Systems. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:222-0 [Conf]
    
36. Joerg Abke, Erich Barke, Jörn Stohmann
    A Universal Module Generator for LUT-Based FPGAs. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:230-235 [Conf]
    
37. Russell Tessier
    Incremental Compilation for Logic Emulation. [Citation Graph (0, 0)][DBLP]
    IEEE International Workshop on Rapid System Prototyping, 1999, pp:236-241 [Conf]